Light Sensor Wiring Layout to Reduce Substrate Stress
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Solution Overview
Problem
The existing light detection apparatus experiences a reduction in imaging properties due to stress caused by differences in physical properties between the wiring layer and the interlayer insulation film, affecting the sensor substrate with photoelectric converters.
Innovation Solution
A light detection apparatus is designed with a sensor substrate and a logic substrate in a layered formation, where a second wiring layer with insulating wiring is formed inside the second semiconductor substrate, parallel to the first surface, and electrically connected to a specified portion of the second semiconductor substrate, reducing stress on the sensor substrate.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a wiring layer is formed on the logic substrate, then electrical connection is achieved, but stress is caused due to difference in physical properties between wiring and interlayer insulation film
Solution Approach 1:
The patent moves the power supply wiring from the conventional planar wiring layer on the logic substrate into the depth dimension by forming it inside the sensor substrate. This vertical relocation separates the thick power supply wiring from the interlayer insulation film structure, eliminating the stress caused by physical property differences while maintaining electrical connection functionality.
Solution Approach 2:
The patent embeds the power supply wiring within the sensor substrate structure, nesting it inside the semiconductor substrate rather than placing it on the external wiring layer. This nested configuration allows the thick power supply wiring to be integrated within the substrate volume, avoiding stress issues with the interlayer insulation film while maintaining compact design.
2Stress or pressure
If cross-sectional area of power supply wiring is reduced, then stress impact is minimized, but IR drop increases
Solution Approach 1:
By relocating the power supply wiring to the vertical dimension inside the sensor substrate, the patent enables the use of larger cross-sectional area wiring without increasing lateral stress on the logic substrate. The thick wiring can be positioned in the depth direction where it does not interfere with the interlayer insulation film, thus maintaining low IR drop while minimizing stress impact.
Solution Approach 2:
The sensor substrate acts as an intermediary structure that hosts the thick power supply wiring internally. This intermediary positioning allows the power supply wiring to have sufficient cross-sectional area for low IR drop while being isolated from the stress-sensitive regions of the logic substrate, effectively mediating between electrical performance requirements and mechanical stress constraints.
3Use of energy by moving object
If thick power supply wiring is used, then IR drop is reduced, but stress on sensor substrate increases
Solution Approach 1:
The patent resolves this contradiction by positioning the thick power supply wiring in the vertical dimension inside the sensor substrate, rather than in the lateral plane. This allows the wiring to have large cross-sectional area for low IR drop while being spatially separated from the interlayer insulation film structure that would be stressed by thick wiring, thus achieving both low IR drop and minimal stress.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration prevents the reduction in imaging properties by minimizing the impact of stress on the sensor substrate, allowing for improved imaging performance without the need for reducing the cross-sectional area of power supply wiring, thus avoiding IR drop issues.
Implementation Method 1
an insulator insulating the wiring from the second semiconductor substrate
Implementation Method 2
a first semiconductor substrate on which a plurality of photoelectric converters is arranged
Data Source
AI summary
A light detection apparatus is provided that makes it possible to prevent a reduction in a level of imaging properties. A second wiring layer is formed inside of a second semiconductor substrate. First wiring (wiring) and second wiring (wiring) are included in the second wiring layer, where the first wiring and the second wiring extend in parallel with a back surface (a first surface) of the second semiconductor substrate. Further, an insulator that insulates the first wiring and the second wiring from the second semiconductor substrate is included in the second wiring layer. Furthermore, the first wiring and second wiring in the second wiring layer are electrically connected to a drain (a specified portion) of a transistor (a connection target) formed in the back surface of the second semiconductor substrate.