Line Drive Signal Enhancement Circuit for OLED Gate Voltage Drop

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Solution Overview

Problem

In silicon-based OLED displays, the large pixel resolution leads to significant delay and voltage drop of scan signals on the gate lead, resulting in non-uniform display due to different data voltages written by pixel drive circuits.

Innovation Solution

A line drive signal enhancement circuit is introduced, comprising a control unit, inverter unit, and output units that utilize transistors to generate and manage two power supply voltages, converting initial scan signals into stronger scan signals with reduced voltage drop and improved transmission capacity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If the pixel resolution is increased to improve display quality, then the display uniformity deteriorates due to large voltage drop and delay on the gate lead

Engineering Contradiction:
Improvepixel resolutionVSAvoiddisplay uniformity
Core Design Contradiction:
Measurement precisionVSReliability

Solution Approach 1:

The gate lead is divided into multiple segments by inserting enhancement circuits at different positions along the gate lead. Each enhancement circuit independently compensates for voltage drop in its local segment, ensuring uniform signal delivery across the entire high-resolution display panel.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A signal enhancement circuit is introduced as an intermediary component between the gate lead and pixel drive circuits. This intermediary actively compensates for voltage drop and delay through transistor-based signal regeneration, maintaining signal integrity across long gate leads in high-resolution displays.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Measurement precision

If the gate lead length is increased to accommodate high resolution, then the voltage drop and delay increase, but adding enhancement circuits increases device complexity

Engineering Contradiction:
Improvepixel resolutionVSAvoidcircuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

Signal enhancement circuits are selectively placed only at critical positions along the gate lead where voltage drop becomes significant, rather than uniformly across the entire display. This local approach provides necessary signal compensation while minimizing the overall number of additional components and circuit complexity.

Inventive Principle:
Principle #3Local quality

3Device complexity

If conventional gate drive circuits are used, then the circuit structure is simple, but turn-on delay increases and line drive capability deteriorates

Engineering Contradiction:
Improvecircuit structureVSAvoidturn-on delay
Core Design Contradiction:
Device complexityVSLoss of time

Solution Approach 1:

The enhancement circuit uses transistors configured to dynamically adjust signal levels based on instantaneous voltage requirements. The transistor switching action provides active signal regeneration that adapts to varying load conditions, reducing turn-on delay while maintaining circuit feasibility through standard semiconductor components.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12002421B2Line drive signal enhancement circuit, shift register unit, display panel
Publication Date: 2024.06.04 BOE TECHNOLOGY GROUP CO LTD
  • US12002421B2 patent drawing
  • US12002421B2 patent drawing
  • US12002421B2 patent drawing

AI summary

The present disclosure provides a line drive signal enhancement circuit, a shift register unit, and a display panel, and relates to the technical field of display. The line drive signal enhancement circuit includes a control unit, an inverter unit, a first output unit and a second output unit. The control unit has a first peripheral control terminal and a second peripheral control terminal respectively loaded with two inverted signals, and the input terminal is electrically connected with the first power supply lead. The first output unit and the second output unit both have two input terminals. The two input terminals are respectively electrically connected with the first power supply lead and the second power supply lead. The output terminal of the control unit is electrically connected with the control terminal of the first output unit and/or the control terminal of the second output unit.