Liner-Free Semiconductor Contacts With Seeded Uniform Deposition
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Solution Overview
Problem
The semiconductor industry faces challenges in forming continuous liner-free contact structures across conductive and insulating structures due to lower deposition selectivity of conductive materials, leading to non-uniform deposition and potential electrical connection degradation.
Innovation Solution
A method involving the formation of a liner-free contact structure along the top surfaces of gate structures and insulating structures, with a process to cut the contact structure into shorter sections, using seed layers and conductive materials to ensure uniform deposition and electrical isolation, thereby reducing fabrication complexities and non-uniformities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional deposition processes are used to form contact structures across conductive and insulating structures, then the deposition process is simple, but the deposition selectivity is low leading to non-uniform deposition
Solution Approach 1:
A liner layer is formed on the insulating structure before depositing the conductive material. This preliminary action creates a foundation that enables uniform deposition of the conductive material across both conductive and insulating structures, resolving the deposition selectivity issue without requiring complex deposition process modifications
Solution Approach 2:
The liner layer acts as an intermediary between the insulating structure and the conductive material. This intermediary layer provides the necessary interface that allows the conductive material to deposit uniformly across different material types, eliminating the need for complex deposition control while achieving manufacturing precision
2Ease of manufacture
If liner-free contact structures are formed to simplify the process, then the manufacturing process is simpler, but the electrical connection reliability degrades due to non-uniform deposition
Solution Approach 1:
The liner layer serves as a mediator that enables the formation of continuous contact structures across insulating regions without requiring complex liner removal processes. This intermediary approach maintains process simplicity while ensuring uniform deposition and reliable electrical connections through the conductive material deposited on the liner
3Device complexity
If the contact structure is formed continuously across gate structures and insulating structures, then the fabrication process is simpler, but the electrical isolation between gate structures is compromised
Solution Approach 1:
The liner layer is selectively removed from regions where electrical isolation is required, such as between adjacent gate structures. This extraction approach allows the contact structure to be formed continuously across gate structures and insulating structures using a simple fabrication process, while maintaining proper electrical isolation by removing the conductive liner in specific isolation regions
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the formation of uniform contact structures, improving electrical connections and reducing structural and compositional non-uniformities, which in turn improves semiconductor device performance.
Implementation Method 1
selectively depositing a conductive layer on the seed layer to fill the tapered trench opening
Implementation Method 2
selectively depositing a conductive layer on the seed layer to fill the tapered trench opening
Data Source
AI summary
A semiconductor device with liner-free contact structures and a method of fabricating the same are disclosed. The method includes forming first and second source/drain (S/D) regions on first and second fin structures, forming a first dielectric layer between the first and second S/D regions, forming first and second gate-all-around (GAA) structures on the first and second fin structures, forming a second dielectric layer on the first and second GAA structures and the first dielectric layer, forming a tapered trench opening in the second dielectric layer and on the first and second GAA structures and the first dielectric layer, selectively forming a seed layer on top surfaces of the first and second GAA structures and the first dielectric layer that are exposed in the tapered trench opening, and selectively depositing a conductive layer on the seed layer to fill the tapered trench opening.


