Load-Adaptive PFC Bypass Circuit for Low-Load Power Supplies
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Solution Overview
Problem
Existing power supplies face inefficiencies and harmonic issues, particularly during low to medium power scenarios, leading to increased energy losses and regulatory compliance challenges due to induced current harmonics, which can destabilize electrical networks and increase operating costs.
Innovation Solution
A power supply with a power factor correction (PFC) circuit that reduces current harmonics by shaping the input current waveform, and a PFC bypass circuit that disables the PFC when the load is below a threshold, optimizing efficiency and compliance with regulatory standards by only enabling PFC during higher loads.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the PFC circuit is continuously enabled to reduce current harmonics and improve power factor, then compliance with harmonic regulations is improved, but energy efficiency deteriorates due to unnecessary power consumption during low load conditions
Solution Approach 1:
The PFC circuit's operation state is dynamically adjusted based on real-time load detection. The control circuit monitors the output load and selectively enables or disables the PFC circuit accordingly, transitioning from a static always-on state to a dynamic adaptive state that optimizes both compliance and efficiency
Solution Approach 2:
The system changes the operational parameter of the PFC circuit (enabled/disabled state) based on load conditions. By detecting when the output load falls below a threshold, the system switches the PFC circuit state to disable it during low-load periods, thereby reducing energy consumption while maintaining compliance during high-load periods
2Object-generated harmful factors
If the PFC circuit is enabled during all operating conditions, then current harmonics are reduced and power factor is improved, but device complexity increases due to continuous operation requirements
Solution Approach 1:
The operational requirements are segmented into different load conditions (high load vs. low load). The control circuit divides the operating range and applies different PFC strategies for each segment, enabling PFC only when necessary for harmonic reduction while simplifying control during low-load segments
3Stability of the object's composition
If the PFC circuit operates continuously to maintain power factor correction, then input current waveform is shaped to match voltage waveform, but productivity decreases due to reduced overall system efficiency during low load scenarios
Solution Approach 1:
The PFC circuit operates periodically rather than continuously, being activated only during high-load periods when harmonic reduction is necessary and deactivated during low-load periods. This periodic operation maintains waveform stability when needed while improving overall system efficiency across the complete operational cycle
Data Source
AI summary
A power supply includes a power factor correction (PFC) circuit, a PFC bypass circuit, and a decision circuit. The PFC circuit is configured to receive an input current from a power source and, when enabled, reduce current harmonics in the input current by shaping an input sinusoidal current waveform to match a phase and shape of a sinusoidal input voltage waveform. The PFC bypass circuit is configured to bypass the PFC circuit when the PFC circuit is disabled. The decision circuit includes a detection circuit configured to detect an output load of the power supply and is configured to output a PFC enable command based at least in part on the detected output load being greater than or equal to a threshold value and a determination that an input voltage of the power source is greater than or equal to a threshold value.