Local Capacitor Reference Voltage Management for Memory Stability

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Solution Overview

Problem

The accuracy of sense operations in memory devices is affected by noise in the power delivery network, particularly in the management of reference voltages used for determining the state of memory cells, leading to instability in read voltages and voltage differences, which can impact the ability to accurately read stored states.

Innovation Solution

The implementation of local capacitors to stabilize read voltages during critical operations by decoupling from the gate voltage and allowing changes in the plate line voltage to track the gate voltage, thereby maintaining a stable voltage across the memory cell, and using multiple local capacitors to provide averaged voltage measurements for more stable reference voltage management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Stability of the object's composition

If local capacitors are used to stabilize read voltages by decoupling from gate voltage, then voltage stability during read operations is improved, but device complexity increases due to additional capacitor components

Engineering Contradiction:
Improvevoltage stabilityVSAvoiddevice complexity
Core Design Contradiction:
Stability of the object's compositionVSDevice complexity

Solution Approach 1:

The patent divides the voltage stabilization function into separate local capacitors positioned at different locations in the memory device. Each local capacitor serves a specific region, providing localized voltage stabilization rather than relying on a single global stabilization mechanism. This segmentation allows the system to maintain voltage stability while distributing the complexity across multiple simple, identical components rather than one complex component.

Inventive Principle:
Principle #1Segmentation

2Reliability

If multiple local capacitors are used to provide averaged voltage measurements, then reference voltage stability is improved, but manufacturing complexity increases

Engineering Contradiction:
Improvereference voltage stabilityVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent employs multiple local capacitors that are identical in structure, capacitance value, and design characteristics. These homogeneous components are distributed across the memory device array, each performing the same voltage sampling and stabilization function. The uniformity of these capacitors simplifies manufacturing processes, as they can be produced using the same fabrication steps and then placed in different locations, reducing overall manufacturing complexity while improving reliability through redundancy and averaging.

Inventive Principle:
Principle #33Homogeneity

3Measurement precision

If local capacitors decouple from gate voltage during read operations, then sense operation accuracy is improved, but power consumption increases due to repeated voltage sampling

Engineering Contradiction:
Improvesense operation accuracyVSAvoidpower consumption
Core Design Contradiction:
Measurement precisionVSUse of energy by moving object

Solution Approach 1:

The local capacitors perform voltage sampling and decoupling operations periodically, specifically during read operations when voltage stabilization is most critical. Rather than continuously sampling and decoupling, the capacitors are activated only when needed - during sense operations where accurate voltage reference is required. This periodic operation reduces overall power consumption while maintaining sense operation accuracy when it matters most.

Inventive Principle:
Principle #19Periodic action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces the need for local repeaters, compensates for higher voltage drops in the power delivery network, and maintains stable voltage differences during read operations, enhancing the accuracy of sense operations in memory devices.

Implementation Method 1

A first node of the first capacitor may be coupled with a switching component. The first capacitor may have a second node coupled with a plate line of the memory cell. The memory device may include a controller that causes the memory device to couple the first node of the first capacitor with a third node that is biased to a second voltage to store a voltage different between the second voltage and the first voltage with using the first capacitor

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS11810609B2Reference voltage management
Publication Date: 2023.11.07 MICRON TECHNOLOGY INC
  • US11810609B2 patent drawing
  • US11810609B2 patent drawing
  • US11810609B2 patent drawing

AI summary

Techniques are described for maintaining a stable voltage difference in a memory device, for example, during a critical operation (e.g., a sense operation). The voltage difference to be maintained may be a read voltage across a memory cell or a difference associated with a reference voltage, among other examples. A component (e.g., a local capacitor) may be coupled, before the operation, with a node biased to a first voltage (e.g., a global reference voltage) to sample a voltage difference between the first voltage and a second voltage while the circuitry is relatively quiet (e.g., not noisy). The component may be decoupled from the node before the operation such that a node of the component (e.g., a capacitor) may be allowed to float during the operation. The voltage difference across the component may remain stable during variations in the second voltage and may provide a stable voltage difference during the operation.