Oscillator Circuit with Location-Based Charge Pump Enable

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Solution Overview

Problem

Conventional memory devices experience power surges and noise due to the simultaneous activation of charge pumps, and time delays in voltage delivery can adversely impact performance when the first activated pump is far from the selected memory bank.

Innovation Solution

A semiconductor memory system where charge pumps are activated in a sequence dependent on the location of the selected memory block, with an Enable Control circuit generating enable signals to selectively activate pumps near the selected block, reducing noise and peak current by staggering their activation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If all charge pumps are activated at once, then power delivery to memory banks is ensured, but power surge and noise increase

Engineering Contradiction:
Improvepower deliveryVSAvoidpower surge and noise
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The charge pump system is segmented into multiple independently controllable units, each associated with specific memory banks. Instead of activating all pumps simultaneously, the system divides them into groups that can be activated separately based on which memory banks are being accessed, thereby reducing peak current and noise while maintaining reliable power delivery.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The charge pump activation scheme is made dynamic rather than static. The system adaptively determines which charge pumps to activate based on real-time memory access patterns and bank selections. This dynamic control allows the system to optimize between power delivery reliability and noise reduction by activating only the necessary pumps for current operations.

Inventive Principle:
Principle #15Dynamics

2Object-generated harmful factors

If charge pumps are activated in a predetermined sequence, then power surge is reduced, but time delay in voltage reaching selected memory bank increases performance impact

Engineering Contradiction:
Improvepower surgeVSAvoidvoltage delivery time
Core Design Contradiction:
Object-generated harmful factorsVSLoss of time

Solution Approach 1:

Different charge pumps are strategically positioned at different locations within the memory device, with each pump located near specific memory banks. This spatial arrangement creates local quality variations where the activation sequence can be optimized for each region. When a particular memory bank is accessed, the nearby charge pump is activated first, ensuring rapid voltage delivery without excessive delay, while still reducing overall power surge through staggered activation.

Inventive Principle:
Principle #3Local quality

3Device complexity

If the first activated charge pump is far from the selected memory bank, then pump activation sequence is simplified, but voltage delivery time increases and performance deteriorates

Engineering Contradiction:
Improvepump activation sequenceVSAvoidmemory performance
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The system employs self-service mechanisms where the memory access request itself provides the information needed to determine the optimal charge pump activation sequence. The control logic automatically identifies which memory banks are being accessed and selects the appropriate charge pumps based on their proximity to those banks, eliminating the need for complex external control sequences while ensuring rapid voltage delivery and maintaining high memory performance.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS9093167B2Oscillator circuit with location-based charge pump enable and semiconductor memory including the same
Publication Date: 2015.07.28 SK HYNIX INC
  • US9093167B2 patent drawing
  • US9093167B2 patent drawing
  • US9093167B2 patent drawing

AI summary

A semiconductor memory includes a plurality of memory blocks each comprising a plurality of memory cells, and a plurality of charge pumps each located near one of the plurality of memory blocks. In an access to the semiconductor memory, depending on the selected memory block, a subset or all of the plurality of charge pumps are activated in one of a predetermined number of sequences.