Lockstep Processor System With Periodic Checker Activation

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Solution Overview

Problem

Existing processor systems using lock-step methods for fault detection in vehicle-mounted systems face challenges in detecting faults within a predetermined period while minimizing heat generation, as they either fail to detect faults when only one processor is operational or increase heat generation due to continuous operation of multiple processors.

Innovation Solution

A processor system with a master processor and a checker processor that performs lock-step operations only when necessary, using clock gating cells to manage processor activity and perform fault detection within a maximum proof test period, thereby reducing heat generation by optimizing processor usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If lock-step operation is continuously performed with multiple processors, then fault detection capability is improved, but heat generation amount increases

Engineering Contradiction:
Improvefault detection capabilityVSAvoidheat generation amount
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The patent implements periodic lock-step operations where the checker processor alternates between operating and stopped states. The control circuit determines whether to perform lock-step operation based on elapsed time since the last operation, creating a periodic pattern that reduces continuous heat generation while maintaining fault detection capability within acceptable time intervals

Inventive Principle:
Principle #19Periodic action

2Temperature

If only one processor is operated to reduce heat generation, then heat generation amount is reduced, but fault detection capability deteriorates

Engineering Contradiction:
Improveheat generation amountVSAvoidfault detection capability
Core Design Contradiction:
TemperatureVSReliability

Solution Approach 1:

The system performs preliminary fault detection by stopping the checker processor after a certain period and only reactivating it when the elapsed time reaches a predetermined threshold. This preliminary action ensures that fault detection is maintained at critical intervals while minimizing the time the processor is active, thus reducing heat generation

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If lock-step operation is performed frequently, then fault detection precision is improved, but heat generation amount increases

Engineering Contradiction:
Improvefault detection precisionVSAvoidheat generation amount
Core Design Contradiction:
Measurement precisionVSTemperature

Solution Approach 1:

The patent dynamically changes the operational parameters of the checker processor based on elapsed time. The control circuit adjusts whether the checker processor operates or stops by evaluating the time since the last lock-step operation, optimizing the balance between fault detection precision and heat generation by adjusting the frequency of operations

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP3065054B1Lockstep processor system with maximum test period
Publication Date: 2020.10.28 RENESAS ELECTRONICS CORP
  • EP3065054B1 patent drawingFigure 1
  • EP3065054B1 patent drawingFigure 2
  • EP3065054B1 patent drawingFigure 3

AI summary

A processor system includes a master processor that successively processes a plurality of tasks, a checker processor that successively processes at least one of the plurality of tasks, and a control circuit that performs control so that the checker processor operates when the master processor and the checker processor perform a lock-step operation, and the checker processor stops its operation when the master processor and the checker processor do not perform the lock-step operation, the lock-step operation being an operation in which each of the master and checker processors processes the same task, in which the control circuit performs control so that a period from when a task is processed by the lock-step operation to when another task is processed in the next lock-step operation is equal to or shorter than a maximum test period, the maximum test period being a test period acceptable to the processor system.