Combinational Logic Coupling to Mask Side-Channel Signatures
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Solution Overview
Problem
Electronic devices are vulnerable to side-channel attacks that exploit power consumption and electromagnetic radiation, as existing countermeasures are not sufficient to prevent unauthorized information extraction.
Innovation Solution
Implementing multiple functionally-equivalent combinational logic circuits with state-sampling components and control circuitry that route and sample inputs and outputs in a cyclic manner, introducing internal differences to diversify power consumption and radiation profiles, and using negative logic to enhance resilience against side-channel attacks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple functionally-equivalent combinational logic circuits are implemented with different hardware implementations, then resilience against side-channel attacks is improved, but device complexity increases
Solution Approach 1:
The system divides the logic circuit into multiple functionally-equivalent segments (first combinational logic circuit, second combinational logic circuit, etc.) that perform the same logical function but with different hardware implementations. Each segment processes portions of the input data independently, making side-channel attacks more difficult while maintaining the overall computational function.
Solution Approach 2:
The patent implements asymmetric hardware designs where functionally-equivalent logic circuits use different physical implementations (e.g., different gate configurations, different routing). This asymmetry ensures that power consumption and radiation patterns differ between circuits performing the same logical operation, thereby masking side-channel information.
2Reliability
If state-sampling components are used to sample outputs and provide inputs to other circuits, then information extraction resistance is improved, but device complexity increases
Solution Approach 1:
State-sampling components act as intermediary elements between the combinational logic circuits. These components sample the output state of one circuit and provide it as input to another circuit, creating an additional layer that obscures the direct relationship between input and output data, thereby resisting side-channel information leakage.
Solution Approach 2:
The patent introduces a temporal dimension to the circuit operation by using state-sampling components that capture intermediate states. This transforms the traditionally synchronous combinational logic into a multi-stage process where intermediate states are sampled and propagated, adding complexity in the time domain that masks side-channel patterns.
3Reliability
If control circuitry routes multiple sets of input data to combinational logic circuits in cyclic alternation, then side-channel attack resistance is improved, but processing time increases
Solution Approach 1:
The control circuitry implements periodic action by routing multiple sets of input data to the combinational logic circuits in cyclic alternation. Different circuits are activated in a repeating sequence, which masks the power consumption patterns associated with specific data processing operations, making side-channel attacks more difficult while maintaining throughput through parallel processing.
Data Source
AI summary
A secure IC includes multiple functionally-equivalent combinational logic circuits, multiple sets of state-sampling components, and control circuitry. Each combinational logic circuit receives one or more inputs, and applies a combinational-logic operation to the one or more inputs so as to produce one or more outputs. Each set of state-sampling components includes one or more state-sampling components that samples one or more of the outputs of one of the combinational logic circuits and provides one or more of the sampled outputs as inputs to another of the combinational logic circuits. The control circuitry receives multiple sets of input data for processing by the combinational logic circuits, routes the sets of input data to the combinational logic circuits, extracts sets of output data from the combinational logic circuits, and outputs each set of output data in association with the respective set of input data.