Logic-Level Metric Counting for Fast Emulation Power Estimation
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Solution Overview
Problem
Existing hardware-based emulation approaches for power estimation in circuit designs are slow, taking approximately 380 hours for a one-hour emulation run, making them impractical for comprehensive power estimation of complex workloads.
Innovation Solution
Incorporating logic level metric count modules within emulation hardware to detect toggle counts (TC) and time-at-1 (T1) counts, enabling faster power estimation by significantly increasing the speed of power estimation processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If existing hardware-based emulation approaches are used for power estimation, then power consumption analysis can be performed, but the process is extremely slow (taking approximately 380 hours for a one-hour emulation run)
Solution Approach 1:
The patent introduces logic level metric count modules as intermediary components within the emulation hardware. These modules act as mediators that directly capture toggle counts and time-at-1 counts from the circuit nodes, bypassing the slow traditional waveform capture and analysis process. The intermediary modules provide accurate power estimation data through dedicated counting circuitry that operates at the hardware level, resolving the contradiction between measurement precision and productivity.
Solution Approach 2:
The patent replaces the mechanical/software-based waveform capture and analysis system with hardware-based logic level metric count modules. Instead of using traditional emulation approaches that rely on software processing of waveform data, the invention uses dedicated hardware circuits (counters and timing logic) to directly generate power estimation metrics. This substitution of mechanical/software systems with hardware systems achieves both high precision and high speed power estimation.
2Reliability
If traditional emulation methods are used, then comprehensive power estimation of complex workloads is possible, but the time required is impractical (380 hours for one hour of emulation)
Solution Approach 1:
The patent implements preliminary action by pre-computing power estimation metrics during the emulation process itself. The logic level metric count modules continuously capture toggle counts and time-at-1 counts during circuit operation, accumulating power-related data in real-time rather than requiring post-emulation analysis. This preliminary capture of power metrics during the actual emulation run dramatically reduces the total time required while maintaining comprehensive estimation capability.
Solution Approach 2:
The patent changes the fundamental parameters of power estimation by measuring logic level metrics (toggle counts and time-at-1 counts) directly at the hardware level rather than analyzing waveform data at higher levels. This parameter change from waveform-based measurement to logic-level metric measurement enables both comprehensive power estimation and practical execution times, as the hardware counters operate at the native speed of the emulation system.
Data Source
AI summary
A processing device may add at least one logic level metric count module to a circuit design, load the circuit design into an emulation system, and apply an emulation workload to the emulation system to which the circuit design is loaded. The processing device may then obtain at least one logic level metric count from the at least one logic level metric count module, the at least one logic level metric count associated with at least a portion of the emulation workload, and present at least one power utilization estimate for the circuit design, where the at least one power utilization estimate for the circuit design is based upon the at least one logic level metric count.