Programmable Logic Circuit Reconfiguration for Information Processing

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

Existing information processing systems experience delays in completing first processing due to the sequential execution of software and hardware modules, where reconfiguration of the hardware module is completed before the first processing is finished, leading to inefficiencies in total processing time.

Innovation Solution

An information processing apparatus that includes a processor connected to a programmable logic circuit, which acquires a software module, starts first processing, reconfigures a hardware module, and supplies intermediate data to the programmable logic circuit to initiate second processing once the hardware module reconfiguration is completed, allowing concurrent execution and reducing waiting times.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If the system waits for first processing to complete before starting second processing, then data consistency is maintained, but total processing time increases

Engineering Contradiction:

Improvetotal processing timeVSAvoidprocessing throughput

Core Design Contradiction:

Loss of timeVSProductivity

Solution Approach 1:

The hardware module is reconfigured in advance during the execution of first processing, so that when reconfiguration completes, the module is ready to immediately process intermediate data without waiting for first processing to finish. This preliminary preparation eliminates idle waiting time.

Inventive Principle:

Principle #10Preliminary action

Solution Approach 2:

The system maintains continuous productive action by overlapping the execution of first processing with the reconfiguration of the hardware module. Both processes run concurrently, and when reconfiguration completes, the hardware module immediately consumes intermediate data, ensuring no idle time in the processing pipeline.

Inventive Principle:

Principle #20Continuity of useful action

2Productivity

If hardware module reconfiguration is performed during first processing, then resource utilization improves, but system complexity increases

Engineering Contradiction:

Improveresource utilizationVSAvoidcontrol logic complexity

Core Design Contradiction:

ProductivityVSDevice complexity

Solution Approach 1:

A buffer stores intermediate data generated during first processing, acting as an intermediary between the processor executing first processing and the hardware module being reconfigured. This buffer decouples the two operations, allowing them to proceed independently without complex synchronization logic.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The system uses feedback from the reconfiguration completion status to trigger the start of second processing. When the hardware module detects that reconfiguration is complete, it automatically begins processing intermediate data from the buffer, creating a self-regulating system that reduces the need for complex external control.

Inventive Principle:

Principle #23Feedback

Data Source

PatentUS11966679B2Information processing apparatus and non-transitory computer readable medium

Publication Date: 2024.04.23 FUJIFILM BUSINESS INNOVATION CORP

AI summary

An information processing apparatus includes a processor connected to a programmable logic circuit and configured to: acquire a software module indicating first processing and start the first processing; reconfigure a hardware module in the programmable logic circuit, the hardware module indicating second processing included in the first processing; and, if reconfiguration of the hardware module is completed before the first processing is completed, supply intermediate data generated by the first processing to the hardware module and cause the programmable logic circuit to start to execute the second processing.