Low Capacitance Cross-Over Structures for Display Bus Lines
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Solution Overview
Problem
As display size increases, line resistance and line capacitance also increase, leading to capacitive and loading effects that cause scan line delay, resulting in issues like luminance non-uniformity, flicker, and image retention in LCD and OLED displays.
Innovation Solution
The implementation of bus lines with low capacitance cross-over structures, where data lines have side walls at cross-over locations that reduce capacitance without significantly increasing resistance, achieved by forming a substrate with a first metal layer as scan lines and a second metal layer as data lines with bumps to create side walls that interconnect segments.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If display size is increased, then display area is improved, but line capacitance increases causing scan line delay
Solution Approach 1:
The patent applies local quality by creating side walls at specific cross-over locations where data lines intersect scan lines. These side walls are formed only at the cross-over points rather than along the entire length of the data lines, locally reducing capacitance where it matters most while maintaining overall display area.
Solution Approach 2:
The patent introduces a vertical dimension by forming side walls that extend upward from the planar data line structure. This third dimension (height) creates additional spacing between the data line and scan line at cross-over points, reducing capacitive coupling without affecting the horizontal display area.
2Ease of manufacture
If conventional bus line structures are used, then manufacturing is simple, but capacitive effects cause luminance non-uniformity and flicker
Solution Approach 1:
The patent changes the geometric parameters of the bus line structure by adding side walls with specific heights at cross-over locations. This modifies the physical dimensions and spacing parameters to reduce capacitance, thereby improving luminance uniformity while maintaining compatibility with existing manufacturing processes.
3Device complexity
If data lines cross over scan lines with standard structure, then device complexity is low, but loading effects increase causing image retention
Solution Approach 1:
The patent segments the data line into multiple sections: normal sections between cross-overs and special cross-over sections with side walls. This segmentation allows the capacitive issues to be addressed only at specific locations rather than requiring complex modifications throughout the entire line structure.
Data Source
AI summary
Display systems and related methods involving bus lines with low capacitance cross-over structures are provided. A representative display system includes: a first structure comprising: a plurality of scan lines extending in a first direction; and a plurality of data lines extending in a second direction and crossing over the scan lines at respective cross-over locations, each of the plurality of data lines having a pair of side walls spaced apart from each other at each of the cross-over locations, with each of the side walls exhibiting a height higher than portions of the data lines not located at the cross-over locations.