Low-Capacitance ESD Diode Topology for High-Voltage Lines
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Solution Overview
Problem
Existing ESD protection devices exhibit high capacitance for working voltages greater than 12 V, which interferes with the normal operation of systems requiring low capacitance, such as RF antennas and automotive high-speed data lines, especially for protection levels like 24 V ESD with 30 kV IEC-ESD and <1 pF capacitance.
Innovation Solution
The ESD protection device employs a configuration of diodes and Zener diodes forming NPN structures in series, with lower capacitance diodes coupled to reduce overall capacitance, utilizing a two-die or multichip module topology, and flip-chip-on-lead or single-die constructions to achieve low capacitance without parallel parasitic effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the diode area is increased to provide ESD protection for working voltages greater than 12 V, then the ESD protection capability is improved, but the capacitance increases to greater than 2 pF
Solution Approach 1:
The ESD protection device is divided into multiple discrete diode components (first diode, second diode, third diode, fourth diode) and Zener diodes arranged in specific series configurations. This segmentation allows the total protection capability to be distributed across multiple smaller capacitance-contributing elements rather than requiring a single large-area diode, thereby reducing overall capacitance while maintaining ESD protection for working voltages greater than 12 V
Solution Approach 2:
The patent transitions from a single-diode architecture to a multi-diode series-parallel architecture, adding dimensional complexity to the circuit topology. By arranging diodes in series strings with Zener diodes and creating multiple parallel paths (first circuit and second circuit), the solution achieves voltage protection in higher voltage ranges without proportionally increasing capacitance, as the capacitance distributes across multiple series elements
2Device complexity
If a single diode structure is used for ESD protection, then the device complexity is low, but the capacitance is high for working voltages greater than 12 V
Solution Approach 1:
The protection function is segmented into multiple diode components (first diode, second diode, third diode, fourth diode) and Zener diodes arranged in specific series configurations. This segmentation allows the total protection capability to be distributed across multiple smaller capacitance-contributing elements rather than requiring a single large-area diode, thereby reducing overall capacitance while maintaining ESD protection
Solution Approach 2:
Multiple diode components and Zener diodes are merged into integrated circuit configurations (first circuit and second circuit) that function as unified ESD protection structures. The merging of these components in series-parallel arrangements achieves both voltage protection for working voltages greater than 12 V and reduced capacitance through the distributed architecture
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides ESD protection devices with capacitances of <1 pF for 30 kV and <0.5 pF for 15 kV, effectively shielding sensitive ICs from ESD strikes while maintaining system functionality.
Implementation Method 1
a first Zener diode, in which the anode of the first diode is coupled to the anode of the first Zener diode to form a first NPN structure
Implementation Method 2
a first circuit including a first diode, a second diode, and a first Zener diode, in which the anode of the first diode is coupled to the anode of the first Zener diode to form a first NPN structure
Data Source
AI summary
Examples of low capacitance bidirectional and unidirectional electrostatic discharge (ESD) protection devices for high voltage (e.g., 15 kV, 30 kV) applications are provided. Such devices include a circuit of a diode and a Zener diode coupled via their anodes to form an NPN structure and another, low capacitance diode coupled in series with the NPN structure. Such circuit may be configured on each of two dies, and the circuits coupled via wire bonds. Additional wire bonds may be used to respectively couple two pins of the device to the two circuits, or the pins may be coupled to the circuits via respective conductive die attaches. In a multichip module (MCM) topology, the NPN diode structure may be coupled to two low capacitance diodes on one die, and that circuit may be coupled to a third low capacitance diode disposed on another die. Some arrangements employ an insulator in conjunction with a single die. Some arrangements enable FlipChip fabrication technology.