Low CTE Interposer Wire Bonding for Fine-Pitch Reliability

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Solution Overview

Problem

Current microelectronic packages face challenges in reducing size while maintaining electrical interconnection reliability, particularly in achieving a balance between miniaturization and thermal expansion compatibility.

Innovation Solution

The design incorporates a subassembly with a low coefficient of thermal expansion (CTE) substrate, fine-pitch contacts, and a monolithic encapsulant, along with wire bonds and electrically conductive spacer elements to interconnect microelectronic elements and substrates, enhancing electrical and thermal stability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Volume of moving object

If the package size is reduced through miniaturization, then the overall dimensions decrease, but the electrical interconnection reliability deteriorates due to finer pitch requirements and thermal expansion mismatches

Engineering Contradiction:
Improvepackage sizeVSAvoidelectrical interconnection reliability
Core Design Contradiction:
Volume of moving objectVSReliability

Solution Approach 1:

A low CTE interposer substrate is introduced as an intermediary component between the microelectronic elements and the package substrate. This interposer serves as a mediator that provides a stable thermal expansion reference, enabling fine-pitch interconnections to maintain reliability even as the overall package size is reduced. The interposer's coarse slot apertures further enhance wire bondability while maintaining the fine pitch geometry.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the CTE parameter of the interposer substrate to be lower than both the package substrate and microelectronic elements. This parameter change creates a stable thermal reference that compensates for thermal expansion mismatches in the fine-pitch interconnections, thereby maintaining electrical reliability during package miniaturization.

Inventive Principle:
Principle #35Parameter changes

2Length of moving object

If fine-pitch contacts are used to reduce package size, then the pitch dimension decreases, but the manufacturing complexity increases due to tighter tolerances and more precise alignment requirements

Engineering Contradiction:
Improvecontact pitchVSAvoidmanufacturing complexity
Core Design Contradiction:
Length of moving objectVSDevice complexity

Solution Approach 1:

The interposer substrate provides a local quality of stability with its low CTE property, creating a controlled environment for fine-pitch contacts. This localized stability allows fine-pitch geometry to be achieved without proportionally increasing overall manufacturing complexity, as the interposer confines the precision requirements to its immediate vicinity.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The low CTE interposer substrate is positioned and configured in advance before final assembly steps. This preliminary action establishes a stable thermal and geometric reference framework that simplifies subsequent fine-pitch contact formation and wire bonding operations, reducing the cumulative complexity of the manufacturing process.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If wire bonds are used to interconnect elements, then electrical connectivity is achieved, but the thermal expansion mismatch causes stress and potential failure

Engineering Contradiction:
Improveelectrical connectivityVSAvoidthermal expansion compatibility
Core Design Contradiction:
ReliabilityVSStability of the object's composition

Solution Approach 1:

The low CTE interposer acts as a thermal expansion mediator between the wire bonds and the package components. By providing a stable thermal reference, the interposer reduces differential thermal stress on the wire bonds during temperature cycling, thereby maintaining both electrical connectivity and structural stability.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent explicitly addresses thermal expansion by selecting an interposer material with CTE lower than both the package substrate and microelectronic elements. This thermal expansion strategy creates a stable reference that compensates for expansion mismatches in the wire bond interconnections, preventing stress-induced failures.

Inventive Principle:
Principle #37Thermal expansion

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach results in a compact microelectronic package with improved electrical interconnection reliability and thermal management, addressing the need for reduced size and enhanced performance.

Implementation Method 1

The first substrate may have a coefficient of thermal expansion ("CTE") of eight parts per million per degree Celsius or less

Methodology Applied
Scientific EffectCoefficient of thermal expansion (CTE): Thermal Expansion

Implementation Method 2

Wire bonds may connect the second element contacts with the second contacts

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 3

A monolithic encapsulant contacts the first and second microelectronic elements and the first and second substrates

Methodology Applied
Scientific EffectPhysical encapsulation: Physical Containment

Data Source

PatentUS8872318B2Through interposer wire bond using low CTE interposer with coarse slot apertures
Publication Date: 2014.10.28 ADEIA SEMICONDUCTOR SOLUTIONS LLC
  • US8872318B2 patent drawing
  • US8872318B2 patent drawing
  • US8872318B2 patent drawing

AI summary

A microelectronic package includes a subassembly, a second substrate, and a monolithic encapsulant. The subassembly includes a first substrate that has at least one aperture, a coefficient of thermal expansion (CTE) of eight parts per million per degree Celsius or less, and first and second contacts arranged so as to have a pitch of 200 microns or less. First and second microelectronic elements are respectively electrically connected to the first and second contacts. Wire bonds may be used to connect the second element contacts with the second contacts. A second substrate may underlie either the first or the second microelectronic elements and be electrically interconnected with the first substrate. The second substrate may have terminals configured for electrical connection to a component external to the microelectronic package. A monolithic encapsulant may contact the first and second microelectronic elements and the first and second substrates.