Low Inductance Integral Capacitor Assembly for Pulse Power

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Solution Overview

Problem

Current capacitor designs for pulse power applications, such as gas discharge lasers, face limitations in achieving high peak current densities due to relatively high inductance and low operating voltage, restricting discharge current to tens of kiloamperes for short discharge channels.

Innovation Solution

The integration of folded foil capacitors with specific configurations, including the connection of adjacent cells in series using bridging elements, results in a low self-inductance capacitor assembly that can be connected in various circuit configurations for enhanced voltage and current multiplication, allowing for efficient and fast current discharge.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional capacitor designs (flat parallel plate, oil impregnated folded Mylar/paper foil, or ceramic doorknob capacitors) are used, then the capacitors can operate at their rated voltages and capacitances, but the self-inductance remains relatively high (15-25 nH for folded foil capacitors), limiting peak discharge current to tens of kiloamperes

Engineering Contradiction:
Improvepeak discharge current capabilityVSAvoidcapacitor assembly structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The capacitor is divided into multiple cells (first capacitor with first stack of cells, second capacitor with second stack of cells) connected in series. Each cell has its own foil electrodes and dielectric layers, allowing the total capacitance to be distributed across multiple segments. This segmentation reduces the self-inductance of each individual cell while maintaining the required voltage and capacitance ratings through series connection.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent integrates multiple capacitor cells and stacks within a single enclosure, creating a nested structure where the first and second stacks of capacitor cells are housed together. The foil electrodes of adjacent cells are connected through bridging elements that are integrated into the same enclosure, forming a compact nested arrangement that minimizes external connection inductance while achieving the required voltage multiplication (2-4x) and peak current (up to 488 kA) performance.

Inventive Principle:
Principle #7Nested doll (Nesting)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration achieves significantly reduced self-inductance, enabling higher peak discharge currents and voltage multiplication, with peak discharge currents reaching up to 488 kA and voltage scaling by factors of two to four, depending on the circuit configuration, while maintaining low inductance.

Implementation Method 1

The integration of folded foil capacitors with specific configurations, including the connection of adjacent cells in series using bridging elements, results in a low self-inductance capacitor assembly that can be connected in various circuit configurations for enhanced voltage and current multiplication

Methodology Applied
Scientific EffectCapacitance: Capacitance

Implementation Method 2

This configuration achieves significantly reduced self-inductance, enabling higher peak discharge currents and voltage multiplication, with peak discharge currents reaching up to 488 kA and voltage scaling by factors of two to four

Methodology Applied
Scientific EffectElectromagnetic Induction: Electromagnetic Induction

Data Source

PatentUS9336949B2Low inductance integral capacitor assembly
Publication Date: 2016.05.10 SPECSCAN
  • US9336949B2 patent drawing
  • US9336949B2 patent drawing
  • US9336949B2 patent drawing

AI summary

The invention provides an integral high-voltage capacitor assembly that yields very low self inductance and provides voltage and current multiplication. The capacitor assembly has two or four capacitors connected in series, with each capacitor made up of a stack of capacitor cells (40) also connected in series. Each of the capacitor cells (40) includes an arrangement of a pair of elongate foil electrodes (10) separated by dielectric (20, 30), and multiply-folded in a substantially flat, wound configuration. In the case of the two-capacitor assembly, in one embodiment the adjacent capacitor cells of the first capacitor (11) are connected in series by joining their foil electrodes on only one longitudinal side of the foil electrodes, while the adjacent capacitor cells of the second capacitor (12) are connected in series by joining their foil electrodes on both longitudinal sides of the foil electrodes. By connecting two units of the two-capacitor assemblies in different ways, various four-capacitor assemblies (80; 90) can be configured to provide enhanced voltage and current multiplication.