Low-k Sidewall Spacer Structure for RF Switch Isolation
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Solution Overview
Problem
Modern RF switch devices face performance degradation due to high parasitic capacitance from silicon nitride sidewall spacers, leading to leakage and insertion losses, and the etch back process with 1% hydrogen fluoride is difficult to control, causing over etching and substrate damage.
Innovation Solution
Employing a sidewall spacer with a low dielectric constant material such as silicon oxycarbonitride (SiOCN) or silicon oxycarbide (SiOC) reduces parasitic capacitance and allows for better control of the etch back process, minimizing leakage and substrate damage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If silicon nitride sidewall spacers are used, then the sidewall spacer provides structural support, but parasitic capacitance increases leading to leakage and insertion losses
Solution Approach 1:
The patent changes the dielectric constant parameter of the sidewall spacer material from high (silicon nitride, k≈7-11) to low (silicon oxycarbonitride, k≈4.2-5.5). This parameter change directly reduces parasitic capacitance between the gate electrode and drain region, thereby reducing leakage current and insertion losses while maintaining the structural support function of the sidewall spacer
Solution Approach 2:
The patent employs composite material composition (silicon oxycarbonitride containing Si, O, C, and N elements) that combines the structural properties needed for sidewall support with low dielectric constant properties. This composite material achieves both mechanical integrity and electrical performance requirements simultaneously
2Ease of manufacture
If etch back process with 1% hydrogen fluoride is used, then the sidewall spacer can be formed, but over etching and substrate damage occur
Solution Approach 1:
The patent changes the material composition parameter of the sidewall spacer to silicon oxycarbonitride, which has different etch characteristics compared to silicon nitride. This material parameter change enables better control of the etch back process using 1% hydrogen fluoride, preventing over etching and substrate damage while still allowing sidewall spacer formation
Solution Approach 2:
The patent uses a sacrificial oxide layer that is intentionally deposited and then removed during etch back. This temporary, disposable layer protects the substrate during processing and is discarded after serving its protective function, preventing substrate damage without affecting the final device structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of low dielectric constant sidewall spacers results in improved RF switch device performance with reduced parasitic capacitance, higher isolation, and lower insertion losses, while the controlled etch back process prevents over etching and substrate damage.
Implementation Method 1
a sidewall spacer with a low dielectric constant material such as silicon oxycarbonitride (SiOCN) or silicon oxycarbide (SiOC) reduces parasitic capacitance
Implementation Method 2
the etch back process with 1% hydrogen fluoride is difficult to control, causing over etching and substrate damage
Data Source
AI summary
Various embodiments of the present disclosure are directed towards a method for forming an integrated circuit (IC). The method includes forming a gate electrode and a gate dielectric stacked over a substrate. A sidewall liner is formed along sidewalls of the gate electrode and along an upper surface of the substrate. A sidewall spacer is formed on sidewalls and an upper surface of the sidewall liner. The sidewall spacer consists essentially of silicon oxycarbonitride and has a dielectric constant great than that of the sidewall liner and less than that of the gate dielectric. A pair of source/drain regions is formed respectively on opposite sides of the gate electrode.