Low-Power Debug via Latch Capture Circuits

The patent segments the debugging functionality into two distinct paths: one for high-power mode debugging using conventional bus/interfaces, and another for low-power mode debugging using dedicated capture circuits and pads. This segmentation allows each path to operate independently with optimized power characteristics, enabling debugging capability during low-power transitions without continuously consuming high power.

The patent introduces intermediary capture circuits (flip-flops, latches) and dedicated pads as mediators between the low-power domain signals and the external debugging equipment. These intermediaries capture critical signal transitions during low-power mode and hold the data until it can be read externally, enabling debugging without requiring the primary circuit to be active and thus reducing power consumption.

The patent implements preliminary action by capturing and storing critical signal transitions in advance during low-power mode transitions, before the actual fault analysis is needed. The capture circuits continuously monitor and latch signal states during mode transitions, so when debugging is initiated, all relevant data is already recorded and ready for immediate analysis, eliminating the need for multiple iterative debugging sessions.

The patent ensures continuity of useful action by maintaining continuous monitoring of critical signals during low-power transitions through dedicated capture circuits. Instead of stopping debugging operations or requiring system suspension, the capture circuits continuously record signal transitions, providing an unbroken data stream that enables comprehensive fault detection in a single debugging session rather than multiple iterations.

The patent applies local quality by implementing monitoring only for critical signals in the low-power domain rather than all system signals. Dedicated capture circuits are strategically placed only where needed to monitor power management signals, mode transition signals, and other critical low-power domain signals. This localized approach provides complete visibility into low-power operations without the excessive hardware complexity of comprehensive system-wide monitoring.

The patent uses copying by creating simplified replicas of critical signal states in capture circuits rather than directly observing the original complex signals. The flip-flops and latches create copy representations of signal transitions that can be easily read and analyzed. This copying approach maintains complete sequence status information while using simple, low-complexity hardware elements instead of complex direct observation mechanisms.

The patent extracts only the essential debugging information from the low-power domain and outputs it through limited pads. Rather than trying to output all system signals or requiring multiple pads for comprehensive monitoring, the capture circuits extract and hold only the critical sequence status information needed for low-power debugging. This extraction approach enables effective debugging through minimal pad usage, working within the constraint of limited pad availability.

The patent implements multi-functionality by designing the limited available pads to serve multiple purposes: they function as both general-purpose I/O during normal operation and as dedicated debug output ports during low-power mode debugging. The same physical pads are reused for different functions at different times, maximizing the utility of limited pad resources and enabling comprehensive debugging capability without requiring additional dedicated debug pads.