Voltage Stabilization Circuit for LPDDR High-Speed Testing

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Solution Overview

Problem

Low power double data rate memory (LPDDR) devices experience operational voltage drops during high-speed testing, leading to narrowed output strobe pass windows due to rapidly rising current demands, which affects the reliability and speed of read/write operations.

Innovation Solution

A test system incorporating a voltage stabilization circuit that generates and adjusts operational voltages to maintain a stable voltage level, using a comparison circuit to detect deviations and an adjustment circuit to compensate for voltage drops, ensuring consistent operational conditions for LPDDR devices during testing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If high-speed testing is performed on LPDDR devices, then testing speed is improved, but operational voltage drops due to rapidly rising current demands, causing narrowed output strobe pass windows

Engineering Contradiction:
Improvetesting speedVSAvoidoutput strobe pass window
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The voltage stabilization circuit performs preliminary action by detecting voltage drops before they significantly impact the output strobe pass window and adjusting the voltage in advance to maintain stable operation during high-speed testing

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The voltage stabilization circuit implements feedback by continuously monitoring the operational voltage of the DUT and dynamically adjusting the voltage level based on detected deviations, ensuring the output strobe pass window remains within acceptable ranges during high-speed testing

Inventive Principle:
Principle #23Feedback

Data Source

PatentUS11598806B2Test apparatus and test method to a memory device
Publication Date: 2023.03.07 NAN YA TECH
  • US11598806B2 patent drawing
  • US11598806B2 patent drawing
  • US11598806B2 patent drawing

AI summary

A test system is disclosed. The test system includes a tester, a first voltage stabilization circuit, and a device under test (DUT). The tester generates a first operational voltage and a control signal. The first voltage stabilization circuit transmits a second operational voltage, associated with the first operational voltage, to a socket board. The DUT operates with the second operational voltage received through the socket board. The first voltage stabilization circuit is further configured to control, according to the control signal, the second operational voltage to have a first voltage level when the DUT is operating.