LSI Design Support Device for Flow-Through Current Detection

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Solution Overview

Problem

Existing methods struggle to detect steady-state flow-through currents in CMOS logic circuits, particularly when design errors lead to such currents, as these are difficult to identify through simulation and may not be evident based on input conditions or patterns.

Innovation Solution

A static technique is employed to determine the possibility of steady-state flow-through currents by extracting Boolean expressions for logic gates and FETs, creating flow-through condition functions, and degenerating these expressions to identify conditions under which flow-through currents occur, regardless of input conditions or patterns.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If simulation methods are used to detect flow-through currents, then detection can be performed during circuit operation, but detection fails when input conditions do not satisfy flow-through current conditions

Engineering Contradiction:
Improvedetection reliabilityVSAvoiddetection coverage
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent replaces dynamic simulation (mechanical/time-based system) with static Boolean expression analysis. By extracting flow-through condition functions as Boolean expressions and analyzing them statically without requiring specific input patterns, the method achieves comprehensive detection coverage while maintaining detection reliability. This substitution eliminates the limitation where simulation only detects issues under specific input conditions.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Adaptability or versatility

If static analysis techniques are used to detect flow-through currents, then comprehensive detection is achieved, but existing static techniques cannot effectively handle complex logic circuits with FETs

Engineering Contradiction:
Improvedetection coverageVSAvoidcircuit complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent segments the complex circuit analysis into manageable components by extracting flow-through condition functions for specific paths and representing them as Boolean expressions. This segmentation allows the static analysis technique to handle complex logic circuits with FETs by breaking down the overall circuit behavior into analyzable logical conditions, making the analysis scalable to complex designs.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the analysis parameter from dynamic simulation parameters (input patterns, timing) to static Boolean expression parameters. By representing flow-through conditions as Boolean expressions that can be analyzed statically, the method achieves comprehensive detection coverage while maintaining tractability even for complex circuits with numerous FETs and logic gates.

Inventive Principle:
Principle #35Parameter changes

3Reliability

If design errors causing flow-through currents are detected early, then design reliability improves, but traditional methods cannot detect errors in circuits with intermingled FETs and logic circuits

Engineering Contradiction:
Improvedesign reliabilityVSAvoiderror detection difficulty
Core Design Contradiction:
ReliabilityVSDifficulty of detecting and measuring

Solution Approach 1:

The patent replaces dynamic simulation with static Boolean expression analysis to detect design errors. By extracting flow-through condition functions as Boolean expressions and analyzing them statically, the method can identify potential flow-through current paths in circuits with intermingled FETs and logic circuits without requiring specific input patterns, thereby improving design reliability while reducing detection difficulty.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS8756542B2LSI design support device and LSI design method
Publication Date: 2014.06.17 RENESAS ELECTRONICS CORP
  • US8756542B2 patent drawing
  • US8756542B2 patent drawing
  • US8756542B2 patent drawing

AI summary

In an LSI designing support device and method, in which in an LSI circuit is designed including a logic gate and an FET, a possibility that a steady-state flow-through current from a power source to a ground is generated is determined. In an inputted netlist including a logic gate and an FET, extraction is made of a flow-through condition function which expresses, in terms of a Boolean expression, on/off of an FET arranged in a path from a power source to a ground or a path from the output of a logic gate to the power source or to the ground. A flow-through condition determining Boolean expression of a logic circuit which supplies an input to the flow-through condition function is extracted. The Boolean expression is degenerated with logic equivalence maintained, and the existence or nonexistence of a possibility of satisfying a flow-through condition is determined.