LTPO Display Panel Layout for Stable Oxide TFT Threshold Voltage
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Solution Overview
Problem
Conventional low temperature polycrystalline oxide (LTPO) thin film transistors (TFTs) face poor reliability due to poor film quality of the first dielectric layer and difficulty in adjusting the interface quality between the active pattern and the dielectric layer, leading to threshold voltage drifts and instability in the bottom gate IGZO TFTs.
Innovation Solution
A display panel design with a substrate, first and second active layers, conductive layers, and specific voltage configurations to reduce the electric field between the active layers and gates, enhancing the stability of the TFTs by using a first conductive layer between the substrate and the second active layer with a lower operating voltage than the second conductive layer, and a larger spacing between the first gate and the second active layer compared to the second gate and the second active layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a first dielectric layer is disposed between a bottom gate and an active pattern of the oxide TFT, then the structure provides gate control, but the film quality is poor and difficult to adjust, leading to poor reliability
Solution Approach 1:
The patent removes the problematic first dielectric layer entirely, transitioning from a conventional bottom-gate structure to a top-gate structure where the gate is positioned above the active layer. This extraction of the defective component eliminates the source of reliability issues while maintaining the essential gate control function through the top gate configuration.
Solution Approach 2:
The patent inverts the conventional bottom-gate structure by placing the gate above the active layer instead of below it. This structural inversion allows for better film quality control and reliability, as the top gate configuration enables precise control of the electric field without the manufacturing difficulties associated with the first dielectric layer.
2Reliability
If the interface quality between the active pattern and the first dielectric layer is poor, then manufacturing is simpler, but reliability deteriorates due to threshold voltage drifts
Solution Approach 1:
The patent removes the problematic interface between the active pattern and the first dielectric layer by eliminating the first dielectric layer. This extraction prevents threshold voltage drifts and reliability issues while maintaining the necessary electrical control through the top gate structure.
Solution Approach 2:
The patent introduces a gate insulating layer as an intermediary between the gate electrode and the active layer. This intermediary layer provides proper electrical isolation and control, enabling reliable threshold voltage management without the defects associated with the conventional first dielectric layer interface.
3Duration of action of stationary object
If the scan signal line is at high potential, then the TFT operates, but the electric field between the channel and gates causes threshold voltage drifts after long time operation
Solution Approach 1:
The patent inverts the gate structure from bottom-gate to top-gate configuration. This inversion fundamentally changes the electric field distribution, positioning the gate above the active layer to provide better control and reduce threshold voltage drifts during prolonged operation at high potentials.
Solution Approach 2:
The gate insulating layer serves as an intermediary that mediates the electric field interaction between the gate electrode and the active layer. This intermediary enables stable operation at high potentials by controlling the electric field distribution and preventing threshold voltage drifts over time.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration improves the stability of the TFTs by reducing the electric field and preventing threshold voltage drifts, thus enhancing the reliability of the display panel.
Implementation Method 1
when a scan signal line is at high potential (NVGH), the channel of the oxide TFT forms an electric field with a top gate and also forms an electric field with a bottom gate
Data Source
AI summary
A display panel and a display device are provided. The present disclosure reduces the magnitude of an electric field formed between a second active layer and a first gate, and improves the stability of a thin film transistor (TFT) formed by the second active layer, the first gate, a second source, and a second drain. Accordingly, the present disclosure solves a problem in conventional oxide TFTs by preventing a TFT device formed by a bottom gate from having poor reliability.