LTPS Array Substrate Mask Elimination via Gate Shadowing
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Solution Overview
Problem
The high complexity and cost of producing low temperature poly-silicon (LTPS) array substrates due to the requirement of multiple masks and processes in the LCD technology, which increases production costs and reduces efficiency.
Innovation Solution
A method for producing LTPS array substrates that eliminates the need for masks by forming a polycrystalline silicon layer without using any masks, involving steps such as forming a gate, buffer layer, insulating layer, and semiconductor layer, and injecting impurity ions to create a source and drain, while using photoresist layers to pattern and etch the substrate surfaces.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional LTPS manufacturing process is used, then high electron mobility and pixel performance are achieved, but the number and types of masks required increases significantly
Solution Approach 1:
The patent extracts and eliminates the mask step from the manufacturing process by using the gate electrode itself as a shadow mask during plasma treatment. The gate structure is utilized to define the active area without requiring separate photomasks, thereby reducing mask complexity while maintaining the ability to achieve high electron mobility through controlled plasma modification of the semiconductor layer
Solution Approach 2:
The gate electrode serves multiple functions: it acts as both the functional gate component of the TFT and as a shadow mask during plasma treatment to define the active area. This multi-functionality reduces the need for dedicated masking layers and simplifies the overall manufacturing process while preserving device performance
2Manufacturing precision
If multiple masks and processes are used to fabricate LTPS array substrate, then precise patterning is achieved, but production cost increases
Solution Approach 1:
The manufacturing process utilizes the gate electrode structure itself to automatically define the active area boundaries during plasma treatment. The gate's physical presence serves as the patterning template, eliminating the need for external masking materials and reducing process complexity while maintaining precise pattern definition
Solution Approach 2:
The patent changes the approach from using multiple photomasks with different patterns to using a single plasma treatment process where the gate structure defines the pattern. By controlling plasma parameters (power, time, gas composition) and utilizing the gate's geometric parameters, precise patterning is achieved without the cost of multiple mask layers
3Reliability
If conventional LTPS process with many steps is used, then device performance is maintained, but production efficiency decreases
Solution Approach 1:
The patent merges the gate formation step with the active area definition step by using the gate electrode as a shadow mask during plasma treatment. This combination eliminates separate masking and etching steps that would otherwise be required, reducing the total number of manufacturing steps while maintaining device performance through controlled plasma modification
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the number and types of masks required, simplifying the manufacturing process and lowering production costs while maintaining high-quality LTPS array substrate production.
Implementation Method 1
forming the buffer layer and a negative photoresist layer on the substrate one by one; exposing one side of the substrate on the opposite side of the gate for removing the negative photoresist layer disposed right above the gate
Implementation Method 2
injecting first impurity ions into the semiconductor layer outside the first section; injecting second impurity ions into the semiconductor layer outside the second section
Data Source
AI summary
An LTPS array substrate and a method for producing the same are proposed. The method includes: forming an insulating layer, a semiconductor layer, and a first positive photoresist layer on the substrate one by one; exposing one side of the substrate on the opposite side of the gate for forming a polycrystalline silicon layer; forming a source and a drain of the TFT on the polycrystalline silicon layer; forming a pixel electrode on the insulating layer and part of the source; forming a plain passivation layer on a source-drain electrode layer; forming a transparent electrode layer on the plain passivation layer so that the transparent electrode layer is connected to the gate, the source, and the drain via the contact hole. The use of masks in types and numbers in the LTPS technology can be reduced. Thus, both of the processes and the production costs are reduced.