LUT-Free Memory Repair via Permanent State Allocation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional memory devices with lookup tables (LUTs) suffer from latency, increased power consumption, and reduced memory density due to the need for LUT access during read and write operations, and they limit memory repair to row-wise or column-wise methods with low efficiency, making bitwise repair impractical.
Innovation Solution
A LUT-free dynamic memory allocation process that identifies abnormal memory cells by setting them to a permanent state, allowing data to be read from or written to healthy cells without a LUT, reducing latency and power consumption, and enabling high-efficiency bitwise memory repair by dynamically allocating memory cells using static calculations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a lookup table (LUT) is used for memory repair, then memory cells can be mapped to replace failed cells, but latency increases due to LUT access during read and write operations
Solution Approach 1:
The patent extracts and removes the lookup table (LUT) from the memory system, replacing it with a LUT-free repair mechanism that uses repair indicators stored directly in the memory array. This elimination of the LUT component directly addresses the latency issue while maintaining repair functionality through an alternative approach.
Solution Approach 2:
The patent performs preliminary actions by pre-calculating and storing repair indicators in the memory array during manufacturing or initialization. These indicators are prepared in advance and stored in dedicated repair locations, allowing the system to bypass LUT access during operational read/write cycles, thus reducing latency.
2Reliability
If a lookup table (LUT) is used for memory repair, then failed memory cells can be mapped to redundant cells, but power consumption increases due to continuous LUT access
Solution Approach 1:
The patent removes the LUT from the system, eliminating the continuous power consumption associated with LUT access during read and write operations. The repair functionality is maintained through stored repair indicators that require minimal power to access and process.
Solution Approach 2:
The memory system serves itself by using internally stored repair indicators to guide repair operations without requiring external LUT access. The repair information is self-contained within the memory array, reducing the need for additional power-consuming access operations to external repair tables.
3Reliability
If a lookup table (LUT) is used for memory repair, then memory cells can be remapped, but memory density decreases due to the space required for the LUT
Solution Approach 1:
The patent extracts and removes the LUT from the memory system, freeing up the space that would have been dedicated to storing the lookup table. This increases the effective memory density while maintaining repair functionality through the alternative LUT-free approach using repair indicators stored in the memory array.
4Ease of operation
If row-wise or column-wise repair methods are used, then memory repair is simplified, but repair efficiency is limited and bitwise repair becomes impractical
Solution Approach 1:
The patent segments the repair approach into bit-level operations rather than requiring entire row or column repairs. By using repair indicators that can be processed at the bit level, the system achieves fine-grained repair efficiency while maintaining practical implementability through systematic processing of individual bit repairs.
Solution Approach 2:
The patent introduces dynamic repair indicator values that can be processed and updated efficiently. The repair indicators are designed to enable dynamic allocation and processing at the bit level, allowing the system to adaptively repair individual bits rather than being constrained to static row or column repair methods.
Data Source
AI summary
Various embodiments of the present disclosure are directed towards a method for memory repair using a lookup table (LUT)-free dynamic memory allocation process. An array of memory cells having a plurality of rows and a plurality of columns is provided. Further, each memory cell of the array has multiple data states and a permanent state. One or more abnormal memory cells is/are identified in a row of the array and, in response to identifying an abnormal memory cell, the abnormal memory cell is set to the permanent state. The abnormal memory cells include failed memory cells and, in some embodiments, tail memory cells having marginal performance. During a read or write operation on the row, the one or more abnormal memory cells is/are identified by the permanent state and data is read from or written to a remainder of the memory cells while excluding the abnormal memory cell(s).