LUT Memory Group Power Gating for Leakage Reduction
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Solution Overview
Problem
Conventional Field Programmable Gate Arrays (FPGAs) using static random access memory (SRAM) in Look-Up Table (LUT) circuits consume power due to leakage current even when not in use, as power is supplied to all memories, including non-selected ones, leading to inefficient power management.
Innovation Solution
A LUT circuit utilizing nonvolatile memories with switch transistors and power-off switches that selectively shut off power supply to unselected memory groups based on input signals, reducing leakage current and dynamic power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If power is supplied to all memories in the LUT when not in use, then data retention is maintained, but power consumption increases due to leakage current
Solution Approach 1:
The memory array is divided into multiple independently controllable memory blocks (e.g., even-numbered blocks and odd-numbered blocks). Power-off control signals can selectively shut down power to specific memory blocks that are not currently in use, while maintaining power to active blocks. This segmentation allows partial power shutdown without affecting data retention in active memories.
2Use of energy by moving object
If power is shut off to reduce leakage current, then power consumption decreases, but data retention is lost
Solution Approach 1:
The power supply state of memory blocks is made dynamic rather than static. Power-off control signals dynamically adjust which memory blocks receive power based on current operational needs. When a memory block is not selected for operation, its power is shut off to reduce leakage; when selected, power is restored to maintain data retention and functionality.
3Speed
If all memories are powered simultaneously, then operational speed is maintained, but dynamic power consumption increases
Solution Approach 1:
Different memory blocks are assigned different power states based on their individual operational requirements. Only the currently selected memory block receives power and operates at full speed, while unselected blocks are powered down. This local differentiation of power quality maintains operational speed for active blocks while reducing overall dynamic power consumption.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces power consumption by selectively shutting off power to unused memory groups, minimizing leakage current and dynamic power usage while maintaining operational efficiency.
Implementation Method 1
a switch group that selectively connects one of the memories to the first output terminal according to the first to i-th input signals
Implementation Method 2
a first power-off switch that shuts off power supply to the first memory group in response to one of the first to i-th input signals; and a second power-off switch that shuts off power supply to the second memory group in response to one of the first to i-th input signals
Data Source
AI summary
One embodiment provides a look-up table circuit, including: 2i memories, a half of which constituting a first memory group, the other half of which constituting a second memory group; first to i-th input terminals to which first to i-th input signals are input, respectively; a first output terminal; a switch group that selectively connects one of the memories to the first output terminal according to the first to i-th input signals; a first power-off switch that shuts off power supply to the first memory group in response to one of the first to i-th input signals; and a second power-off switch that shuts off power supply to the second memory group in response to the one of the first to i-th input signals.