LVDS Driver Phase Alignment for Reduced Spikes and Ringing
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Solution Overview
Problem
Existing LVDS drivers face challenges in reducing non-idealities at the output, such as voltage spikes and ringing, especially at higher frequencies, due to timing mismatches between differential signals and incomplete impedance matching.
Innovation Solution
A driver circuit for LVDS is proposed, comprising a phase alignment circuit and an output driver circuit. The phase alignment circuit generates internal and inverted internal signals with aligned phases, which are then used by the output driver circuit to produce output signals with reduced non-idealities.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If traditional LVDS driver circuits are used without phase alignment, then the circuit structure is simple, but time shifts and phase misalignment occur between differential signals at higher frequencies
Solution Approach 1:
A phase alignment circuit is introduced as an intermediary component between the input signal and the output driver. This circuit generates aligned internal signals that compensate for timing differences, ensuring proper phase alignment of differential outputs without requiring complex adjustments to the main driver structure.
Solution Approach 2:
The phase alignment circuit performs preliminary signal conditioning before the signals reach the output driver. By pre-aligning the phases of complementary signals in advance, the circuit prevents timing issues from propagating to the output stage, eliminating the need for complex post-processing or adjustment mechanisms.
2Reliability
If inverters of different speeds are used to compensate for time shift, then timing alignment is achieved, but the device complexity increases and it is difficult to satisfy all process corners
Solution Approach 1:
The phase alignment circuit uses controllable delay elements that can adjust their propagation delay parameters dynamically. By changing the delay parameters of these elements, the circuit can compensate for process variations and temperature effects, achieving timing alignment across all process corners without requiring multiple fixed-speed inverters.
Solution Approach 2:
The phase alignment circuit introduces dynamic adjustability to the signal path delays. Rather than using fixed-speed inverters, the circuit employs controllable delay elements that can adapt their timing characteristics in real-time, allowing the system to maintain proper phase alignment under varying operating conditions without increasing structural complexity.
3Reliability
If the output slope of the driver is controlled to address timing issues, then phase alignment is improved, but power consumption increases
Solution Approach 1:
The phase alignment circuit performs the necessary timing adjustments in advance, before the signals reach the power-consuming output driver stage. By pre-aligning the phases using low-power delay elements, the circuit avoids the need for the output driver to consume excessive power for slope control, thereby reducing overall power consumption while maintaining proper phase alignment.
4Use of energy by moving object
If LVDS drivers operate at reduced supply voltages, then power consumption is reduced, but output swing is diminished and fully differential topology is sacrificed
Solution Approach 1:
The phase alignment circuit acts as a mediator that enables the output driver to maintain proper differential signaling at reduced supply voltages. By ensuring precise phase alignment before the signals reach the driver, the circuit allows the driver to operate efficiently at lower voltages without sacrificing output swing or fully differential topology, as the pre-aligned signals reduce the stress on the voltage headroom.
Data Source
AI summary
A driver circuit for low voltage differential signaling, LVDS, includes a phase alignment circuit including an input configured to receive an input signal, a first output configured to provide an internal signal as a function of the input signal, and a second output configured to provide an inverted internal signal, which is the inverted signal of the internal signal, and an output driver circuit coupled to the phase alignment circuit, the output driver circuit including a first input configured to receive the internal signal, a second input configured to receive the inverted internal signal, a first output configured to provide an output signal as a function of the internal signal and a second output configured to provide an inverted output signal which is the inverted signal of the output signal. The phase alignment circuit provides the inverted internal signal with its phase aligned to a phase of the internal signal.