MAC Frame Check Sequence Verification for Corrupted Packet Detection

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Solution Overview

Problem

Existing network interface devices lack effective mechanisms to detect and handle data packet errors due to memory corruption or logical corruption, which can lead to unreliable data transmission and inefficient retransmission processes.

Innovation Solution

The network interface device incorporates frame check sequence value checking mechanisms in the media access control layer to verify data integrity, providing indications of unexpected data and enabling early packet dropping or retransmission, thereby ensuring reliable data transmission.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If frame check sequence value checking is implemented in the media access control layer, then data integrity is improved, but device complexity increases

Engineering Contradiction:
Improvedata integrityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by computing the frame check sequence value in advance when the data packet is initially received and stored in memory. This pre-computed FCS value is then compared against a re-computed value later, allowing error detection to occur before transmission. This resolves the contradiction by establishing reliability through advance error detection while keeping the actual transmission process simple and efficient.

Inventive Principle:
Principle #10Preliminary action

2Productivity

If frame check sequence value checking is performed before transmission, then retransmission efficiency is improved, but processing time increases

Engineering Contradiction:
Improveretransmission efficiencyVSAvoidprocessing time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent performs the frame check sequence computation and verification in advance, before the data packet is transmitted over the network. By computing the FCS value when the packet is first received and storing it alongside the packet data, the system prepares for potential error detection upfront. This allows for rapid error detection at transmission time without adding significant processing delays during the actual data transfer, thus improving retransmission efficiency while minimizing processing time impact.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS12476732B2Network interface device with frame sequence value checking
Publication Date: 2025.11.18 XILINX INC
  • US12476732B2 patent drawing
  • US12476732B2 patent drawing
  • US12476732B2 patent drawing

AI summary

A network interface device comprises circuitry to add a frame check sequence value a data packet to be transmitted onto a network. The data packet with the frame check sequence value is stored in memory. Media access control layer circuitry reads the data packet from the memory and determines if the frame check sequence value is correct. When it is note correct, it is determined that the data in the data packet is corrupted.