Multiply-and-Accumulate Circuit Using Product Counting for Power Reduction
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Solution Overview
Problem
Conventional MAC operations in digital signal processing, especially in wireless communication, require high-speed and power-hungry hardware, which can be impractical and expensive, and result in performance penalties due to full precision multiply and add operations for each number pair.
Innovation Solution
A method and circuit that count the occurrence of products based on multiplier pairs, mapping equivalent pairs to the same counter, reducing the need for multiple counters and simplifying the processing by using up/down counters to accumulate partial sums efficiently.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional full precision multiply and add operations are performed for each number pair, then calculation accuracy is maintained, but power consumption increases and processing speed decreases
Solution Approach 1:
The patent changes the parameter of numerical precision by performing MAC operations at reduced precision (e.g., 5-bit or 6-bit precision) instead of full precision. This parameter change significantly reduces power consumption while maintaining sufficient accuracy for the application, directly resolving the contradiction between calculation accuracy and power consumption.
2Speed
If dedicated MAC hardware is implemented for high-speed operations, then processing speed improves, but device complexity and cost increase
Solution Approach 1:
The patent segments the MAC operation into distinct stages: reduced-precision multiplication stage and reduced-precision addition stage. This segmentation allows each stage to be optimized independently with simpler, lower-power circuitry while maintaining overall high processing speed, thus resolving the contradiction between processing speed and hardware complexity.
Solution Approach 2:
The patent introduces dynamic precision adjustment where the precision level can be adapted based on the specific application requirements. This dynamic approach allows the system to operate at lower precision (simpler hardware) when full precision is not needed, while maintaining the capability to switch to higher precision when required, balancing speed and complexity.
3Measurement precision
If full precision MAC operations are performed, then calculation accuracy is maintained, but processing throughput decreases
Solution Approach 1:
The patent changes the precision parameter to enable higher processing throughput. By performing operations at reduced precision (e.g., truncating intermediate results to 5-6 bits), the system can process more number pairs per unit time while maintaining sufficient accuracy for the application, directly resolving the contradiction between calculation accuracy and processing throughput.
Data Source
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AI summary
A method and corresponding circuit for determining a final result for a desired series of multiply-and-accumulate (MAC) operations are based on counting the occurrence of products in the desired series of MAC operations, multiplying the counts by their corresponding products to obtain partial sums, and adding the partial sums to obtain the final result. MAC processing as taught herein can be applied to a wide range of applications, such as received signal processing in wireless communication for computationally efficient (and high-rate) generation of interference correlation estimates and/or equalization filter values for a received communication signal.