MAD Memristor Divider Circuits With Lower Delay and Complexity
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Solution Overview
Problem
Existing memristor-based gate designs for arithmetic operations face challenges in scalability, applicability, completeness, and performance, particularly in dividers, which suffer from high delay and complexity due to the need for numerous transistors, memristors, switches, and drivers.
Innovation Solution
The implementation of Memristors-As-Drivers (MAD) gates, which combine sense circuitry with the IMPLY operation to reduce complexity and delay by optimizing binary non-restoring and SRT dividers, using fewer memristors and drivers, and incorporating multiplexer and shift logic within a single MAD adder.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Device complexity
If traditional memristor-based gate designs are used for dividers, then the implementation is possible, but the delay and complexity increase significantly due to requiring numerous transistors, memristors, switches and drivers
Solution Approach 1:
The patent combines sense circuitry with the IMPLY operation into a unified MAD gate structure. The sense circuitry and logic operation are merged into a single integrated unit that uses memristors as drivers, eliminating the need for separate driver circuits and reducing overall device complexity while maintaining functional performance
Solution Approach 2:
The MAD gate design serves multiple functions: it performs logic operations (IMPLY), sensing, and driving capabilities within a single unified structure. This multi-functional approach replaces the need for separate logic gates, sense circuits, and driver stages that would otherwise be required in traditional designs
2Device complexity
If traditional memristor-based gate designs are used for dividers, then the implementation is possible, but the number of required components (transistors, memristors, switches and drivers) increases
Solution Approach 1:
The patent merges multiple functional components into the MAD gate structure. The sense circuitry, logic operation units, and driver elements are combined into an integrated design that uses memristors as multi-functional drivers, significantly reducing the total count of transistors, memristors, switches and drivers compared to traditional separate-component designs
Solution Approach 2:
Each MAD gate instance performs multiple functions simultaneously - logic operation, sensing, and driving - which means fewer individual components are needed overall. The memristors serve as universal drivers that can control multiple aspects of the circuit operation without requiring dedicated driver transistors for each function
Data Source
AI summary
Memristor-based dividers using memristors-as-drivers (MAD) gates. As a result of employing MAD gates in memristor-based dividers, such as binary non-restoring dividers and SRT dividers, the number of delay steps may be less than half than the number of delay steps required in traditional CMOS implementations of dividers. Furthermore, by using MAD gates, memristor-based dividers can be implemented with less complexity (e.g., fewer memristors and drivers). As a result, by the memristor-based dividers using MAD gates, the speed and complexity of a wide variety of arithmetic operations is improved.


