Laminated Magnetic Core Plating for Eddy Current Reduction
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Solution Overview
Problem
The production of magnetic cores for high-frequency components is hindered by material saturation limits and eddy current-induced inefficiencies, leading to increased costs and complexity due to the need for insulation layers, which are time-consuming and expensive to produce using current methods like CVD and PVD.
Innovation Solution
A novel Duty Cycle Plating method that rapidly deposits thousands of layers of metal and insulation in a matter of minutes, using a copper-coated plate cycled through metal plating and insulation environments, such as an oxidizing or CCVD environment, to create thin, imperfect insulation layers that effectively impede eddy currents without the need for additional steps or specialized equipment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If insulation layers are added to metal cores to prevent eddy currents, then power efficiency is improved, but manufacturing cost and time increase significantly
Solution Approach 1:
The patent combines the metal layer deposition and insulation layer formation into a single integrated electroplating process. The insulation layers are formed in-situ during the electroplating of metal layers, eliminating the need for separate CVD or PVD processing steps. This merging of processes maintains effective eddy current blocking while dramatically improving manufacturing throughput and reducing costs.
Solution Approach 2:
The electroplating bath is designed to perform multiple functions simultaneously: depositing metal layers, forming insulation layers, and providing adhesion promotion. By using a universal electroplating process that can deposit both conductive and insulating materials, the patent eliminates the need for specialized equipment and multiple processing steps, thereby maintaining energy efficiency while improving productivity.
2Reliability
If traditional CVD or PVD processes are used to deposit insulation layers, then insulative properties are improved, but manufacturing cost and time increase
Solution Approach 1:
The patent changes the processing parameters by using electrochemical deposition instead of thermal vapor deposition. The electroplating process uses controlled electrical current, pH, and chemical composition to deposit insulation layers with appropriate resistivity and thickness. This parameter change maintains reliable insulative properties while simplifying the manufacturing process and reducing equipment complexity.
Solution Approach 2:
The patent replaces the mechanical/thermal vapor deposition systems (CVD/PVD) with an electrochemical field-based deposition system. By using electrical fields and electrochemical reactions to deposit insulation layers, the patent achieves comparable or superior insulative properties with simpler, more cost-effective equipment and reduced process complexity.
3Speed
If high-frequency operation is required, then component performance is improved, but eddy current effects become more intense and problematic
Solution Approach 1:
The patent segments the metal core into multiple thin metal layers separated by insulation layers deposited in-situ. This segmentation into laminated structure effectively blocks eddy current pathways while maintaining magnetic flux guidance. The fine segmentation achieved through rapid electroplating enables high-frequency operation by preventing intense eddy current formation, thus improving performance while managing the harmful effects.
4Reliability
If numerous thin layers are deposited to achieve high-frequency capability, then eddy current resistance is improved, but production time increases
Solution Approach 1:
The patent maintains continuous useful action by performing both metal layer deposition and insulation layer formation in a single uninterrupted electroplating cycle. The process continuously alternates between depositing thin metal layers and forming thin insulation layers without removing the substrate or changing processing environments. This continuity enables the deposition of numerous thin layers for high-frequency capability while minimizing production time.
Solution Approach 2:
The patent performs preliminary action by pre-configuring the electroplating bath chemistry and electrical parameters to automatically alternate between metal deposition and insulation formation. The bath contains both metal salts and insulating agents, and the electrical cycling is pre-programmed to deposit layers in the required sequence. This preliminary setup enables rapid deposition of multiple layers without intermediate processing steps, reducing production time while maintaining eddy current resistance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enables the production of small, high-frequency capable magnetic cores quickly and cost-effectively, reducing eddy current losses and core resistivity, while maintaining strong insulative properties, thus improving power efficiency and scalability.
Implementation Method 1
a plate containing a plateable surface is fully immersed into a plating bath to plate a metal layer
Implementation Method 2
brought out of the bath to be immersed in an insulative environment in which insulation layers are deposited on the metal layers
Data Source
AI summary
An apparatus and method for plating magnetic cores by periodically transferring a plate directly back and forth between a metal plating environment and an insulation deposit environment. This direct metal to insulation to metal plating is enabled by a nano-scale insulation layer that provides an imperfect coverage of the metal layer while still keeping sufficient insulation to prevent eddy current formation—even during high-frequency current applications. Therefore, this invention enables the practical creation of magnetic cores having layers with widths even under one nanometer and can generate cores having a layer scale that can be varied to suit a variety of uses in the microelectronic industry.