Magnetic Majority Gate With Constriction For Domain Wall Pinning
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Solution Overview
Problem
Existing spintronic majority gate devices face challenges in maintaining reliable operation and scalability due to domain wall pinning and sensitivity to device size variations, making them difficult to manufacture and integrate into compact CMOS logic circuits while maintaining low power consumption and compact footprint.
Innovation Solution
A magnetic majority gate device with a magnetic propagation layer comprising multiple buses and a central constriction that allows for the reliable propagation of domain walls, enabling robust operation across a wide range of dimensions and easy integration, using standard photolithography techniques, and allowing for cascadability and non-volatile logic functionality.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If the device length L is increased to allow domain wall propagation, then the device can operate with more input states, but the device becomes sensitive to domain wall pinning and fails to return expected results
Solution Approach 1:
A non-magnetic constriction layer is introduced as an intermediary element between the ferromagnetic layers. This constriction layer locally narrows the magnetic propagation path, preventing domain wall pinning at the center of the device while allowing domain walls to pass through. The constriction acts as a mediator that resolves the conflict between device length requirements and domain wall propagation reliability.
2Area of stationary object
If the device size is reduced to achieve compact footprint, then integration density increases, but manufacturing precision requirements become more stringent
Solution Approach 1:
The magnetic propagation layer is designed with locally varied properties: wider regions at the inputs and outputs, and a narrowed constriction region at the center. This local quality variation allows the device to maintain larger critical dimensions in most areas (improving manufacturability) while creating a specific localized feature (the constriction) that ensures reliable domain wall propagation. The constriction layer thickness is controlled to be between 0.5-2 nm, providing precise local control without requiring extreme precision across the entire device.
3Ease of manufacture
If standard photolithography techniques are used for fabrication, then manufacturing complexity is reduced, but achieving the required constriction dimensions becomes challenging
Solution Approach 1:
The magnetic propagation layer is constructed as a composite structure with multiple layers: a first ferromagnetic layer, a non-magnetic constriction layer, and a second ferromagnetic layer. The non-magnetic constriction layer (e.g., Ru, Rh, Ir, or their oxides) has different etching properties than the ferromagnetic layers, enabling selective removal to create the constriction feature using standard photolithography. This composite structure allows the constriction to be formed with thicknesses of 0.5-2 nm using conventional fabrication techniques without requiring advanced lithography.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a compact, low-power, and reliable spintronic majority gate device that can be scaled down easily, resistant to domain wall pinning, and compatible with CMOS technology, enabling efficient propagation of domain walls and stable operation even at larger critical dimensions, thus overcoming the limitations of existing devices.
Implementation Method 1
an electric charge representative of an input logic state may generate a propagating domain wall, e.g., using the effect of spin-transfer torque applied by a magnetic tunnel junction
Implementation Method 2
The propagating magnetic state carried by the domain wall may then be used in a spintronic logic circuit
Implementation Method 3
where Aex is the exchange constant and Keff is the effective anisotropy
Implementation Method 4
converted back to an electric charge representative of an output logic state, e.g., using a tunnel magnetoresistance effect detectable by another magnetic tunnel junction
Data Source
AI summary
The disclosed technology relates generally to spintronics, and more particularly to a magnetic majority gate device. In one aspect, a magnetic majority gate device includes a magnetic propagation layer and at least one input transducer. The magnetic propagation layer includes a plurality of magnetic buses configured to guide propagating magnetic domain walls along longitudinal directions corresponding to elongated directions of the magnetic buses. The plurality of magnetic buses includes a plurality of input magnetic buses, where each of the input magnetic buses has a corresponding input site configured to receive a corresponding input magnetic domain wall. At least one input transducer at a corresponding input site is configured to convert a digital input electrical signal into an input magnetic domain wall, such that a magnetization state of the input magnetic domain wall corresponds to a digital logic state of the digital input electrical signal. The at least one input transducer is configured to inject an in-plane electrical current into the corresponding input magnetic bus if the digital logic state is a predetermined digital logic state. The magnetic propagation layer includes a central region at which the magnetic buses converge and are joined together, such that the central region is configured for an interaction of input magnetic domain walls guided by two or more magnetic buses. The central region includes at least one magnetic constriction configured to locally restrict propagation of propagating magnetic domain walls.