Magnetic Memory Read Circuit for Discharge Timing Variation
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Solution Overview
Problem
Existing magnetic memory devices face challenges in accurately reading data due to variations in discharge start timings of memory cells, leading to potential read errors.
Innovation Solution
The magnetic memory device employs a read circuit with a delay circuit that adjusts the read execution timing based on the discharge start timing of each memory cell, ensuring equal discharge times and reducing read errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a conventional read circuit is used without delay adjustment, then the circuit structure is simple, but variations in discharge start timings cause read errors
Solution Approach 1:
The delay circuit pre-adjusts the read execution timing based on the discharge start timing of each memory cell. By performing this timing adjustment in advance, the patent ensures that all memory cells are read at equal discharge times, eliminating read errors caused by timing variations without requiring complex real-time control mechanisms
Solution Approach 2:
The delay circuit acts as an intermediary component between the read circuit and memory cells. It receives the discharge start timing signal and introduces a controlled delay to synchronize the read execution timing across different memory cells, thereby resolving the timing variation issue while maintaining circuit simplicity
2Reliability
If read execution timing is not adjusted, then the operation is fast, but discharge time variations lead to read errors
Solution Approach 1:
The delay circuit pre-calculates and applies the necessary timing adjustment before the read operation executes. By determining the equal discharge time in advance and programming the delay circuit accordingly, the patent achieves accurate reads without requiring iterative adjustments or extended operation times
Solution Approach 2:
The read circuit uses feedback from the discharge start timing detection to adjust the read execution timing. The delay circuit is configured based on the actual discharge characteristics of memory cells, creating a feedback loop that optimizes read timing for maximum accuracy while minimizing operation time
Data Source
AI summary
According to one embodiment, a magnetic memory device includes a memory cell, a first power supply circuit, first, second and third switches, a comparator, a delay circuit and a sense amplifier. The memory cell includes a variable resistance element and a selector element. The first power supply circuit supplies the memory cell with a first voltage. The first switch is coupled between the memory cell and the first power supply circuit. The second switch is coupled between the memory cell and a ground voltage node. The comparator compares a voltage of the memory cell with a second voltage lower than the first voltage, and to output a first signal when the voltage of the memory cell drops below the second voltage. The delay circuit delays the first signal output from the comparator by a first delay time and to output a second signal.