Magnetic Memory Cell Switch Transistor Leakage Control
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Solution Overview
Problem
Magnetic memory devices experience reliability issues due to leakage currents and crosstalk caused by high voltage applications to bit and source lines, affecting unselected memory cells during read and write operations.
Innovation Solution
Incorporating a first switch transistor between the bit line and magnetic tunnel junction, with a word line connected to the transistor's third terminal to control its on/off state, preventing leakage currents by disconnecting the transistor when operations are not performed on selected memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high voltage is applied to bit line during read/write operations, then operation speed and efficiency are improved, but leakage current flows through unselected memory cells causing crosstalk and reducing reliability
Solution Approach 1:
The patent divides the memory cell structure into segmented components with independent control. Each memory cell is equipped with its own switch transistor that can be independently controlled by word lines, allowing selective activation. This segmentation enables only the targeted memory cell to conduct current during read/write operations while keeping other cells isolated, thus preventing crosstalk while maintaining high-speed operation.
Solution Approach 2:
The patent introduces switch transistors as intermediary elements between the bit line and magnetic tunnel junctions. These switch transistors act as mediators that control current flow based on word line signals. When a memory cell is selected for operation, its switch transistor turns on to allow current flow; when unselected, the switch transistor remains off, blocking leakage current. This intermediary mechanism resolves the contradiction by enabling high-speed operations only when needed while preventing crosstalk during idle states.
2Power
If high voltage is applied to bit line, then write operation effectiveness is improved, but crosstalk is generated in unselected memory cells
Solution Approach 1:
The patent applies local quality control through individually controllable switch transistors for each memory cell. Each switch transistor responds to its specific word line signal, creating localized current pathways. During write operations, only the targeted memory cell's switch transistor is activated, concentrating the high voltage effect precisely where needed. This local control prevents the propagation of harmful effects to neighboring unselected cells, eliminating crosstalk while maintaining effective write operations.
3Reliability
If memory cells are isolated during non-operation, then crosstalk is reduced, but device complexity increases due to additional switch transistors
Solution Approach 1:
The patent employs universal switch transistors that serve multiple functions within each memory cell. These transistors act as both selection switches for activated cells and isolation switches for unselected cells simultaneously. The same word line infrastructure that enables selective addressing also provides automatic isolation of unselected cells. This multi-functionality reduces the need for separate isolation mechanisms, thereby limiting the increase in device complexity while achieving effective crosstalk reduction.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively prevents leakage currents through unselected memory cells, reducing crosstalk and enhancing the reliability of magnetic memory devices by isolating the magnetic tunnel junctions during non-operation states.
Implementation Method 1
A method of writing data to the magnetic memory is to perform a write operation by generating a magnetic field around a magnetic tunnel junction in a memory cell
Implementation Method 2
a first switch transistor and a magnetic tunnel junction... The first word line is connected to a third terminal of the first switch transistor
Data Source
AI summary
A magnetic memory device is provided. The magnetic memory device includes a bit line, a first word line, a source line, and a memory cell. The memory cell includes a first switch transistor and a magnetic tunnel junction. A first side of the magnetic tunnel junction is connected to a first terminal of the first switch transistor. The bit line is connected to a second terminal of the first switch transistor. The source line is connected to a second side of the magnetic tunnel junction. The first word line is connected to a third terminal of the first switch transistor.