Main Band Chip Module Interconnection Clock Training with Sideband Feedback

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Solution Overview

Problem

The existing methods for initializing clock lines in die-to-die connections within integrated circuit chip modules are time-consuming and inefficient, particularly as the number of data and clock lines increases, leading to prolonged initialization times.

Innovation Solution

Implementing automatic result sharing (ARS) during the training process, where the receiving module automatically sends a training result through a sideband before the completion of the training pattern iterations, allowing for truncated training and faster initialization of clock lines.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the complete training pattern iterations are executed for clock line initialization, then the training accuracy and reliability are improved, but the initialization time increases significantly

Engineering Contradiction:
Improvetraining accuracyVSAvoidinitialization time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The receiving module monitors the training pattern reception in real-time and provides feedback by sending an automatic result indicator through the sideband when a predetermined number of iterations are successfully received. This feedback mechanism allows the transmitting module to stop sending training patterns early, reducing initialization time while maintaining sufficient training accuracy.

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

Instead of completing all predetermined training pattern iterations, the system performs only the necessary partial iterations required to achieve reliable training. The automatic result indicator triggers when a sufficient number of iterations are received, allowing the process to stop before completing the full iteration count, thus reducing time loss while maintaining adequate training reliability.

Inventive Principle:
Principle #16Partial or excessive action

2Measurement precision

If a separate request-response cycle is implemented for training reports, then the training status verification is improved, but the initialization process complexity and time increase

Engineering Contradiction:
Improvetraining status verificationVSAvoidinitialization process complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The training status verification is merged into the existing sideband communication protocol. The automatic result indicator is transmitted through the sideband along with other control and status signals, eliminating the need for a separate request-response cycle. This integration maintains accurate training status verification while reducing process complexity and initialization time.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The receiving module automatically generates and transmits the training result indicator without requiring a separate request from the transmitting module. This self-service approach allows the receiving module to proactively report training status, maintaining precise verification while simplifying the overall process by eliminating additional communication cycles.

Inventive Principle:
Principle #25Self-service

3Productivity

If the training pattern iterations are truncated based on automatic result, then the initialization speed is improved, but the completeness of training may be compromised

Engineering Contradiction:
Improveinitialization speedVSAvoidtraining completeness
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The system performs a predetermined number of training pattern iterations, which is sufficient to achieve reliable training without completing all possible iterations. The automatic result indicator triggers when this sufficient number is reached, allowing early termination that maintains training completeness while significantly improving initialization speed.

Inventive Principle:
Principle #16Partial or excessive action

Solution Approach 2:

The mechanical completion of all training iterations is replaced by an intelligent control mechanism using the automatic result indicator. This substitution allows the system to dynamically determine when training is sufficient and terminate early, replacing the rigid full-completion approach with a flexible, speed-optimized process that maintains training reliability.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS12386382B2Reduced training for main band chip module interconnection clock lines
Publication Date: 2025.08.12 QUALCOMM INC
  • US12386382B2 patent drawing
  • US12386382B2 patent drawing
  • US12386382B2 patent drawing

AI summary

Aspects relate to reduced training for main band chip module interconnection clock lines. In one example a method includes sending iterations of a first training pattern from a module of a first die to a module partner of a second die on a first main band clock line of a die-to-die connection, the die-to-die connection including a sideband, a main band comprising the first main band clock line, and at least one data line supported by at least the first main band clock line. An automatic result is received from the module partner through the sideband prior to completion of the iterations of the first training pattern, the automatic result indicating successfully receiving the training pattern. Data is communicated with the module partner through the main band using at least the first main band clock line in response to receiving the automatic result.