Majority Voting Memory Array Without Latch Overhead
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Solution Overview
Problem
Existing semiconductor memory devices require multiple memory cell arrays for majority voting, leading to increased circuit size and device size, especially as the bit number of information data increases, due to the need for multiple data latches to hold data until all bits are read out.
Innovation Solution
A semiconductor memory device with a single memory cell array that writes each bit of the information data piece into multiple memory elements corresponding to one address and performs majority voting on the read-out bits, eliminating the need for data latches by reading and voting on bits simultaneously.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple memory cell arrays with independent input/output ports are used for majority voting, then reliability of written information data is enhanced, but circuit size of the overall device increases
Solution Approach 1:
The patent merges multiple memory cell arrays into a single memory cell array, combining the functions that previously required separate arrays. The single array is organized with multiple memory element groups (each containing r memory elements) per address, allowing the system to perform majority voting while maintaining a compact circuit structure.
Solution Approach 2:
The patent introduces a new organizational dimension within the memory array by creating r memory element groups per address, each group containing r memory elements. This dimensional reorganization allows multiple bits to be stored and accessed simultaneously within a single array, enabling majority voting without requiring multiple separate arrays.
2Volume of stationary object
If one memory cell array is used with data written in three addresses for majority voting, then device size is reduced, but three data latches are required to hold data until all three are read out, increasing circuit size
Solution Approach 1:
The patent performs preliminary organization of data within the memory array structure itself. By pre-organizing r memory element groups per address, each containing r memory elements, the system prepares the data storage structure in advance to enable simultaneous reading and voting without requiring external latches for data holding.
Solution Approach 2:
The memory array structure provides self-service by incorporating the voting capability directly into its organization. The r memory element groups per address can be read simultaneously and voted upon without requiring external data latches, as the memory structure itself enables the necessary data holding and comparison functions.
3Quantity of substance
If the bit number of information data increases, then information capacity is improved, but the size of data latches increases, leading to increased overall device size
Solution Approach 1:
The patent segments the memory array into r memory element groups per address, with each group containing r memory elements. This segmentation allows the system to handle increased bit numbers by distributing data across multiple segments that can be accessed and voted upon simultaneously, avoiding the need for large monolithic data latches.
Solution Approach 2:
The memory element groups serve multiple functions: they store data bits, hold data during the voting process, and provide the structure for simultaneous reading and voting. This multi-functionality eliminates the need for separate data latches, allowing the system to handle increased bit numbers without proportionally increasing device size.
Data Source
AI summary
A majority voting processing device performs majority voting on respective bits of information data piece including r-number of bits (r is an integer of 2 or greater). The device includes a memory including a plurality of memory element groups each including r-number of memory elements that store data for the corresponding r-number of bits, respectively, the plurality of memory element groups each being provide for one address. A memory access unit writes each bit of the information data piece in k-number (k is an odd number of 3 or greater) of the memory elements in the memory element group corresponding to one address, and reads out the k-number of bits written in the k-number of the memory elements corresponding to that one address. A majority voter that performs majority voting on the k-number of bits read out from the memory by the memory access unit.