Mapping Circuit for Deterministic Threshold Detection
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Solution Overview
Problem
Conventional circuit architectures for extracting the K largest samples from a dataset have non-deterministic processing times and require significant resources, making them inefficient and resource-intensive, especially when clearing memories for processing new datasets.
Innovation Solution
The proposed circuit architecture uses a mapping circuit to compare input samples with comparison values, generating indication signals and cumulative distribution function (CDF) counts, allowing for deterministic processing time and reduced resource usage by implementing a CDF-based approach with fewer circuit blocks, enabling efficient extraction of the K largest elements in a programmable range of 3 to 67 cycles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional circuit architectures are used to extract K largest samples, then the extraction function is achieved, but the processing time becomes non-deterministic and resource consumption increases
Solution Approach 1:
The patent segments the dataset processing into discrete comparison operations against threshold values. The mapping circuit divides the input dataset into segments that can be independently compared against comparison values, with each comparison producing binary indication signals. This segmentation enables deterministic processing by breaking down the complex extraction task into manageable, predictable steps that can be executed in a fixed number of cycles (3 to 67 cycles as stated in the patent).
Solution Approach 2:
The patent transforms the problem from directly comparing all sample pairs into a different dimensional approach by introducing comparison values as an intermediate reference dimension. Instead of comparing samples directly to find the K largest, the system maps samples to comparison values, generating indication signals that indicate whether each sample is greater than or equal to each comparison value. This dimensional transformation enables deterministic threshold range determination.
2Adaptability or versatility
If conventional circuit architectures clear memory for new datasets, then new data processing is enabled, but resource consumption and processing time increase
Solution Approach 1:
The patent performs preliminary actions by pre-defining comparison values and threshold ranges before actual data processing begins. The system pre-configures the mapping circuit with comparison values that span the expected data range, allowing it to rapidly adapt to new datasets without extensive memory clearing or reconfiguration. This preliminary setup enables the circuit to quickly process new datasets by simply updating the comparison values rather than clearing entire memory structures.
Solution Approach 2:
The patent utilizes parameter changes by modifying comparison values and threshold ranges to adapt to different datasets. Instead of clearing memory and restarting processing, the system changes the parameter values (comparison thresholds) to match the new dataset's characteristics. This allows the same circuit architecture to efficiently process multiple datasets with different ranges and distributions by simply adjusting the comparison parameters rather than performing resource-intensive memory clearing operations.
3Productivity
If more circuit blocks are used for data processing, then processing capability improves, but resource consumption and device complexity increase
Solution Approach 1:
The patent implements universality by designing a mapping circuit that performs multiple functions using the same hardware resources. The mapping circuit can process different datasets with varying ranges and distributions by changing comparison values, rather than requiring dedicated circuit blocks for each dataset type. The adder circuit and memory structure serve universal purposes by accumulating indication signals across different comparison operations, enabling the same physical resources to handle diverse data processing tasks efficiently.
Solution Approach 2:
The patent merges multiple comparison operations and accumulation functions into a unified circuit architecture. Instead of having separate circuits for each comparison or accumulation task, the system combines these functions into an integrated mapping circuit that processes multiple comparison values simultaneously. The adder circuit merges indication signals from multiple comparisons, and the memory structure consolidates threshold range information, reducing the total quantity of circuit blocks needed while maintaining high processing capability.
Data Source
AI summary
An electronic system includes a mapping circuit configured to receive input samples of a dataset within a defined range of values. The mapping circuit is configured to perform comparisons that compare each input sample to each of a plurality of comparison values selected from the defined range of values. For each comparison, the mapping circuit generates an indication value specifying whether the input sample used in the comparison is greater than or equal to the comparison value used in the comparison. The system includes an adder circuit configured to generate a sum of the indication values for each comparison value and a memory configured to maintain counts corresponding to the comparison values. The counts are updated by the respective sums. The system includes a threshold detection circuit configured to determine, for the dataset, a threshold value or threshold range based on the counts read from the memory.