Mask-Programmable Interconnect for Heterogeneous Power Supply Integration
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Solution Overview
Problem
The existing semiconductor technologies face challenges in programmable heterogeneous integration of stacked semiconductor die, particularly in meeting the diverse power supply voltage requirements of daughter ICs, which often necessitates redesigning or re-fabricating the primary and daughter ICs, leading to increased costs.
Innovation Solution
The solution involves a semiconductor device with a primary IC die featuring through-die vias and heterogeneous power supplies, coupled with a mask-programmable interconnect that redistributes these power supplies to a vertically stacked daughter IC die, using a redistribution metal and via layer to electrically connect the power supplies to the daughter IC's active circuitry, allowing for customizable power supply configuration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a primary IC is designed to provide power supplies to daughter ICs, then power supply capability is improved, but the primary IC cannot meet the various power supply voltage requirements of a wide array of potential daughter ICs
Solution Approach 1:
The patent implements a mask-programmable interconnect structure that allows the primary IC's power supply configuration to be dynamically adapted after fabrication. Through post-fabrication mask programming, the interconnect can be configured to connect different power supply voltages to through-die vias, enabling the same primary IC to work with multiple daughter ICs having different power requirements without redesign
Solution Approach 2:
The invention changes the electrical parameters of the interconnect by programming different mask patterns that establish different electrical connections. The mask-programmable interconnect can be programmed to provide various voltage levels (e.g., 1.8V, 2.5V, 3.3V) to different regions, allowing the primary IC to adapt to different power supply requirements of daughter ICs
2Adaptability or versatility
If the primary IC and daughter IC are re-designed to provide compatible power supplies, then power supply compatibility is improved, but re-designing and re-fabricating costs are prohibitive
Solution Approach 1:
The patent incorporates through-die vias and mask-programmable interconnect structures during the initial fabrication of the primary IC, preparing the infrastructure in advance. This preliminary action enables post-fabrication reconfiguration without requiring costly redesign and re-fabrication, allowing the same hardware to be adapted to different power supply requirements through software-like mask programming
Solution Approach 2:
The invention creates multiple programmable interconnect configurations that can be loaded onto the same primary IC, effectively copying different power supply distribution patterns without physical re-fabrication. The mask-programmable interconnect can be re-programmed to create different electrical connection patterns, replacing the need for multiple physically different IC designs
3Productivity
If a daughter IC is flip-chip bonded to the primary IC, then vertical integration is improved, but the daughter IC cannot obtain power directly from the package substrate
Solution Approach 1:
The patent introduces through-die vias as intermediary structures that penetrate the primary IC to provide direct electrical access to power supplies. These vias act as conductors that bridge the package substrate and the daughter IC, enabling power delivery through the flip-chip bonded interface without requiring the daughter IC to access the package substrate directly
Data Source
AI summary
Method and apparatus for programmable heterogeneous integration of stacked semiconductor die are described. In some examples, a semiconductor device includes a first integrated circuit (IC) die including through-die vias (TDVs); a second IC die vertically stacked with the first IC die, the second IC die including inter-die contacts electrically coupled to the TDVs; the first IC die including heterogeneous power supplies and a mask-programmable interconnect, the mask-programmable interconnect mask-programmed to electrically couple a plurality of the heterogeneous power supplies to the TDVs; and the second IC die including active circuitry, coupled to the inter-die contacts, configured to operate using the plurality of heterogeneous power supplies provided by the TDVs.