Mask Register Bit Reversal and Permutation Instructions

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Solution Overview

Problem

Current computer systems lack efficient methods for reversing and permuting bits within mask registers, which are essential for vector operations, leading to limitations in data parallelism and performance in applications like multimedia and scientific computations.

Innovation Solution

The introduction of instructions such as KREVERSEBITS and KPERM, which allow for bit reversal and permutation within mask registers, enabling symmetric bit arrangement and flexible bit manipulation, respectively, to support various data types like Byte, Word, Doubleword, and Quadword sizes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional bit manipulation methods are used in mask registers, then basic operations can be performed, but data parallelism and processing performance are limited

Engineering Contradiction:
Improvedata parallel operations performanceVSAvoidbit manipulation capability
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent divides the 64-bit mask register into multiple 8-byte elements, allowing independent manipulation of each element. This segmentation enables parallel bit reversal and permutation operations on multiple elements simultaneously, improving data parallelism while maintaining full adaptability for different data types and operation modes.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces universal instructions (VKBPSHUFEB, VKBPBLENDVB) that can perform multiple bit manipulation functions including reversal, permutation, and blending operations. These instructions work across different data types (byte, word, doubleword, quadword) and mask register configurations, providing both enhanced productivity and versatility through a single unified approach.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Adaptability or versatility

If mask registers are used for vector operations, then data parallelism is enabled, but efficient bit reversal and permutation operations are lacking

Engineering Contradiction:
Improvebit reversal and permutation capabilityVSAvoidvector operations performance
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent implements preliminary bit reversal and permutation capabilities directly within the mask register operations. By performing these transformations in advance during mask preparation stages, the system eliminates the need for separate post-processing steps, thereby enhancing both bit manipulation versatility and overall vector operation performance.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent introduces intermediate mask registers (k0-k7) that serve as mediators between source and destination vector registers. These intermediate masks facilitate complex bit manipulation operations by allowing multi-stage transformations, where bit reversal and permutation can be composed and combined with other operations, improving both adaptability and performance.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Adaptability or versatility

If simple mask operations are implemented, then device complexity is reduced, but flexibility in bit manipulation is limited

Engineering Contradiction:
Improvebit manipulation flexibilityVSAvoidinstruction set complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent achieves flexible bit manipulation by changing operational parameters rather than adding complex hardware. The VKBP instructions use control fields and immediate values to specify different operation modes (reversal, permutation, blending), data element sizes, and mask register configurations. This parameter-based approach provides high flexibility while keeping the device implementation relatively simple.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS10387148B2Apparatus and method to reverse and permute bits in a mask register
Publication Date: 2019.08.20 INTEL CORP
  • US10387148B2 patent drawing
  • US10387148B2 patent drawing
  • US10387148B2 patent drawing

AI summary

An apparatus and method are described for performing a bit reversal and permutation on mask values. For example, a processor is described to execute an instruction to perform the operations of: reading a plurality of mask bits stored in a source mask register, the mask bits associated with vector data elements of a vector register; and performing a bit reversal operation to copy each mask bit from a source mask register to a destination mask register, wherein the bit reversal operation causes bits from the source mask register to be reversed within the destination mask register resulting in a symmetric, mirror image of the original bit arrangement.