Mask ROM Cell Structure for Data Integrity
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Solution Overview
Problem
Conventional non-volatile semiconductor memory cells are not capable of functioning as mask read-only memory cells, which require specific structures to maintain data integrity and prevent user programming after manufacturing, while existing technologies lack efficient methods to differentiate between storing states in such memory cells.
Innovation Solution
The development of a mask read-only memory with modified cell structures, including specific gate and diffusion region configurations, allows for the creation of first and second state cell structures that can accurately record and differentiate between logic states '1' and '0' through distinct bit line and select line voltage configurations during a read cycle.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If conventional non-volatile semiconductor memory cell structures are used, then the memory can be programmed by users (OTP or MTP functionality), but the memory cannot function as mask read-only memory with pre-recorded data integrity
Solution Approach 1:
The memory cell structure is segmented into distinct components with specialized functions: control gates for voltage application, charge storage regions for data retention, and diffusion regions for state detection. This segmentation allows the memory to be configured for mask ROM operation where data integrity is maintained through structural design rather than user programming capability.
Solution Approach 2:
Different regions of the memory cell are given different properties: the charge storage layer provides non-volatile data retention, the control gates provide voltage control for reading, and the diffusion regions provide state differentiation. This local quality assignment enables the cell to function as mask ROM by emphasizing data integrity over reprogrammability.
2Ease of manufacture
If a single unified memory cell structure is used, then manufacturing is simplified, but the ability to accurately differentiate between storing states (logic '0' and logic '1') is insufficient
Solution Approach 1:
The memory cell employs local quality differentiation where specific diffusion regions are optimized for detecting logic '0' states while other regions detect logic '1' states. This allows a single cell structure to accurately differentiate between storing states through localized property variations rather than requiring multiple cell types.
Solution Approach 2:
The charge storage layer acts as an intermediary that converts the binary data state into distinguishable electrical characteristics detectable by the diffusion regions. This intermediary mechanism enables accurate state differentiation while maintaining manufacturing simplicity through a unified cell structure.
3Reliability
If mask read-only memory is designed with pre-recorded data, then user programming is prevented ensuring data security, but the memory requires complex cell structures to maintain two distinct states
Solution Approach 1:
The memory cell structure is designed to be universal, serving both as a mask ROM cell for secure pre-recorded data and maintaining compatibility with standard memory fabrication processes. The same basic cell structure can represent logic '0' or logic '1' depending on the presence or absence of charge in the storage region, eliminating the need for completely separate cell designs.
Solution Approach 2:
The memory utilizes parameter changes in the electrical characteristics of the diffusion regions based on charge state. By monitoring voltage or current parameters in response to applied gate voltages, the cell can distinguish between logic states without requiring complex structural modifications, thus maintaining data security while controlling device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables the creation of a reliable mask read-only memory that maintains data integrity by allowing accurate detection of storing states without user programmability, leveraging distinct voltage configurations to differentiate between cell states, thereby enhancing data retention and preventing unauthorized modifications.
Implementation Method 1
The first gate structure is formed on a surface of the substrate for receiving a word line voltage during a read cycle. The second gate structure formed on the surface of the substrate for receiving a read voltage during the read cycle.
Implementation Method 2
The first diffusion region is formed in the surface of the substrate and located adjacent to a first side of the first gate structure for generating a first bit line voltage during the read cycle
Data Source
Figure 1
Figure 2A~2C
Figure 3A~3C
AI summary
A novel mask read-only memory is provided. After the mask read-only memory leaves the factory, the mask read-only memory has two types of cell structures. The first type cell structure records a first storing state (e.g. the logic state "1 "), and the second type cell structure records a second storing state (the logic state "0").