Masked Write Error Correction in Memory Devices
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Solution Overview
Problem
As memory devices increase in capacity, it becomes challenging to fabricate devices without defective memory cells, leading to errors during operations, and existing methods like redundant cells and error correction circuits are not fully effective in reducing errors and current consumption during write operations.
Innovation Solution
A method and system for a memory device that includes an error correction circuit to detect and correct errors during a masked write operation by generating new write data using error-corrected read data and writing it back into the cell array, along with a write error correction code, while deactivating mask signals to reduce current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If a masked write operation is performed to write only a portion of data, then current consumption is reduced, but error occurrence increases due to potential defective memory cells in the unmasked portion
Solution Approach 1:
The patent performs a read operation before the masked write operation to retrieve existing data from the memory cell array. This preliminary action allows the system to have backup data ready, which can be used to fill in defective cells during the subsequent write operation, thereby preventing error occurrence while maintaining low current consumption.
Solution Approach 2:
The patent introduces an intermediary mechanism that uses the read data as a mediator to replace defective cells during the masked write operation. The read data serves as a backup that can be written into defective cells, ensuring data integrity without requiring full write operations, thus maintaining low current consumption while improving reliability.
2Reliability
If error correction circuits are used to correct errors, then reliability is improved, but device complexity increases
Solution Approach 1:
The patent implements a self-service mechanism where the memory system uses its own read data to correct potential errors during masked write operations. Instead of relying solely on complex external error correction circuits, the system leverages its internal resources (read data from the same cell array) to fix defective cells, thereby improving reliability without significantly increasing device complexity.
Solution Approach 2:
The patent merges the error correction function with the existing masked write operation by combining the read operation, data comparison, and write-back operations into a unified process. This integration allows error correction to be performed as part of the normal masked write operation flow, reducing the need for separate complex error correction circuits.
3Reliability
If redundant memory cells are used to replace defective cells, then reliability is improved, but manufacturing complexity increases
Solution Approach 1:
The patent extracts the error correction function from the manufacturing process and implements it through operational procedures. Instead of physically adding redundant memory cells during fabrication, the system uses software-based error correction by reading existing data and writing it back to replace defective cells during operation, thereby improving reliability without increasing manufacturing complexity.
Solution Approach 2:
The patent replaces the mechanical approach of physically adding redundant memory cells during fabrication with an operational approach using read and write operations. This substitution eliminates the need for complex physical reconfiguration during manufacturing while achieving the same reliability improvement through data-based error correction during device operation.
Data Source
AI summary
A method for operating a memory includes: receiving a first write command and a first write address; receiving first write data a portion of which is masked; reading first read data and a first read error correction code from a region selected based on the first write address in a cell array; detecting and correcting an error in the first read data based on the first read error correction code to produce error-corrected first read data; generating first new write data by replacing the masked portion of the first write data with a portion of the error-corrected first read data; generating a first write error correction code based on the first new write data; and writing the first new write data and the first write error correction code into the region selected based on the first write address in response to the detecting of the error.