Master-Slave Charge Pump Voltage Booster
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Solution Overview
Problem
Traditional charge pumps, such as clock doublers, suffer from inefficiencies and voltage losses due to loading, processing, and parasitic resistance, which require increasing the number of stages to achieve desired output voltages, leading to cascading impacts on voltage delivery.
Innovation Solution
The implementation of a master-slave configuration in charge pumps, where a controller portion with smaller capacitors drives a booster portion with larger capacitors, separates load-driven components from control capacitors, reducing losses and increasing efficiency by reducing the number of stages needed to achieve target voltages.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If the number of stages in traditional charge pumps is increased to achieve desired output voltages, then the output voltage is improved, but the loading losses, processing losses, and parasitic resistance losses increase
Solution Approach 1:
The charge pump is divided into multiple stages, where each stage contributes to the overall voltage multiplication. By segmenting the voltage boosting function across stages with progressively larger capacitors, the patent reduces the burden on individual stages and minimizes cumulative losses while achieving the desired output voltage.
Solution Approach 2:
The patent changes the capacitor values across stages, with each subsequent stage having larger capacitors than the previous one. This parameter progression optimizes the charge transfer efficiency and reduces losses by matching capacitor sizes to the voltage levels and current requirements at each stage.
2Strength
If the number of stages in traditional charge pumps is increased to achieve desired output voltages, then the output voltage is improved, but the device complexity increases
Solution Approach 1:
The charge pump is divided into multiple stages, where each stage contributes to the overall voltage multiplication. By segmenting the voltage boosting function across stages with progressively larger capacitors, the patent reduces the burden on individual stages and minimizes cumulative losses while achieving the desired output voltage.
3Device complexity
If traditional charge pump configurations are used, then the device structure is simple, but the efficiency is reduced due to cascading impacts on voltage delivery
Solution Approach 1:
The patent changes the capacitor values across stages, with each subsequent stage having larger capacitors than the previous one. This parameter progression optimizes the charge transfer efficiency and reduces losses by matching capacitor sizes to the voltage levels and current requirements at each stage.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration reduces loading, processing, and layout losses, allowing for increased efficiency and reduced stage count, effectively doubling the output voltage with half the number of stages compared to traditional designs.
Implementation Method 1
Charge pumps can include components (e.g., diodes, switches, comparators, capacitors, resistors, or a combination thereof) that are organized to provide an output voltage that is boosted or reduced from an incoming source voltage
Implementation Method 2
the charged storage structure can be reconfigured (e.g., using one or more relays or switches) from a parallel connection with the voltage supply for the pre-charge phase to a series connection with the voltage supply for a boost phase
Data Source
AI summary
An electronic device includes: a clock booster configured to generate a boosted intermediate voltage greater than a source voltage, wherein the clock booster includes: a controller capacitor configured to store energy for providing a control signal, wherein the control signal is for controlling charging operations to generate the boosted intermediate voltage based on the source voltage, and a booster capacitor configured to store energy according to the control signal for providing the boosted intermediate voltage; and a secondary booster operatively coupled to the clock booster, the secondary booster configured to generate an output voltage based on the boosted intermediate voltage, wherein the output voltage is greater than both the source voltage and the boosted intermediate voltage.