Master-Slave Chip Measurement Using Oscillation Counting

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Solution Overview

Problem

Existing electronic chip systems that determine physical quantities, such as temperature or power, require large surface area, high costs, and are prone to radioelectric interference due to the use of analogue to digital converters and multiple connections between master and slave chips.

Innovation Solution

A system comprising a slave module with a determination module that uses an oscillating signal frequency dependent on the physical quantity, allowing the master module to calculate the value without an ADC, reducing the need for a precise timer and minimizing connections through a serial link.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If an analogue to digital converter (ADC) is used to determine the physical quantity, then the measurement precision is improved, but the device complexity and manufacturing cost increase significantly

Engineering Contradiction:
Improvephysical quantity determination accuracyVSAvoidADC circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts the complex ADC function from the slave chip and relocates it to the master chip. The slave chip only needs to generate frequency signals and count oscillations, while the master chip performs the ADC conversion by counting oscillations over a calibrated time period. This extraction eliminates the need for complex ADC circuits in the slave chip, reducing its complexity and cost while maintaining measurement precision.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent uses a simplified copying approach where the slave chip copies only the essential frequency generation and oscillation counting functions, while the master chip handles the complex conversion and calibration data storage. This division allows the slave chip to be a simpler, lower-cost device while the master chip contains the sophisticated conversion logic.

Inventive Principle:
Principle #26Copying

2Reliability

If multiple connections are used between master and slave chips, then the reliability of data transmission is improved, but the surface area occupied on the PCB increases and radioelectric interference occurs

Engineering Contradiction:
Improvedata transmission reliabilityVSAvoidradioelectric interference
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent extracts the timing and control functions from the slave chip and relocates them to the master chip. The master chip generates start and stop signals for oscillation counting, eliminating the need for complex synchronized timing connections between chips. This extraction reduces the number of connections required while maintaining reliable data transmission through the simplified serial interface.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent introduces a serial communication interface as an intermediary between the master and slave chips. This single serial link mediates all data transmission, replacing multiple parallel connections. The serial interface inherently reduces radioelectric interference while maintaining reliable communication through protocol-based error handling and data verification.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Measurement precision

If a precise timer is implemented in the slave module, then the measurement precision is improved, but the device complexity and manufacturing cost increase

Engineering Contradiction:
Improvetime measurement accuracyVSAvoidtimer circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent extracts the precise timing function from the slave chip and relocates it to the master chip. The master chip contains the calibrated timer that generates accurate start and stop signals for oscillation counting. The slave chip only needs to count oscillations during the time interval defined by the master chip's timer, eliminating the need for a precise timer in the slave chip while maintaining measurement accuracy through the master chip's calibrated timing.

Inventive Principle:
Principle #2Taking out (Extraction)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables efficient determination and transmission of physical quantities from slave to master chips, reducing costs and interference while allowing a single master to control multiple slaves with reduced interface complexity.

Implementation Method 1

a determination module configured to determine a value of a physical quantity of the slave module... determine a number of oscillations... of an oscillating signal of which a frequency depends on the value of the physical quantity

Methodology Applied
Scientific EffectFrequency dependence on physical quantity:

Data Source

PatentUS11271570B1System comprising a slave module and a master module
Publication Date: 2022.03.08 STMICROELECTRONICS (GRENOBLE 2) SAS
  • US11271570B1 patent drawing
  • US11271570B1 patent drawing
  • US11271570B1 patent drawing

AI summary

The system comprising a slave module and a master module. The master module comprises a master control module (CONTRM). The slave module comprises a determination module (DETER). The determination module (DETER) is configured to determine a value of a physical quantity of the slave module. The determination module (DETER) is configured to receive, from the master control module (CONTRM), a command to start counting and a command to end counting. The determination module (DETER) is configured to determine a number of oscillations, between reception of the command to start counting and reception of the command to end counting, of an oscillating signal of which a frequency depends on the value of the physical quantity.