Arithmetic Units for Matrix Multiplication via Column Vector Propagation

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Solution Overview

Problem

Existing image processing apparatuses consume extra power and slow down due to software processing for general-purpose use, while fully dedicated circuits cannot perform other calculations.

Innovation Solution

An arithmetic processing apparatus comprising a network of arithmetic units that perform calculations by storing column vectors from matrices in corresponding units, calculating dot products, and propagating data sequentially to adjacent units, thereby accelerating attention mechanism-based network model calculations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If general-purpose computing is used for machine learning processing, then versatility is maintained, but processing speed decreases and power consumption increases due to software processing overhead

Engineering Contradiction:
Improveprocessing speedVSAvoidversatility
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The computing system is segmented into multiple arithmetic units (first arithmetic unit, second arithmetic unit, third arithmetic unit, fourth arithmetic unit) that can be independently configured and operated. Each unit processes specific matrix operations, allowing parallel execution while maintaining system versatility through modular architecture.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The arithmetic units are designed with dynamic configuration capabilities, where the same hardware can be reconfigured to perform different matrix operations (e.g., switching between processing different matrix dimensions and operation types) through programmable control, thus achieving both high speed and versatility.

Inventive Principle:
Principle #15Dynamics

2Measurement precision

If data is transmitted between arithmetic units during matrix multiplication, then calculation accuracy is maintained, but processing time increases due to sequential data propagation

Engineering Contradiction:
Improvecalculation accuracyVSAvoidprocessing time
Core Design Contradiction:
Measurement precisionVSLoss of time

Solution Approach 1:

The system performs preliminary data preparation by storing complete matrix data (first matrix and second matrix) in the arithmetic units before the multiplication operation begins. This preliminary loading eliminates the need for repeated data transmission during calculation, maintaining accuracy while reducing processing time.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The arithmetic units are designed to perform continuous calculations without interruption. The first arithmetic unit continuously computes the first product while the second arithmetic unit simultaneously computes the second product, ensuring continuous useful action without idle time for data transmission.

Inventive Principle:
Principle #20Continuity of useful action

3Productivity

If multiple arithmetic units are used for parallel processing, then processing speed increases, but device complexity increases due to additional hardware components

Engineering Contradiction:
Improveprocessing speedVSAvoiddevice complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

Each arithmetic unit is designed as a universal computing element capable of performing multiple types of operations (matrix multiplication, dot product calculations) on different data formats. This multi-functionality reduces the need for specialized hardware for each operation type, thereby reducing overall device complexity while maintaining parallel processing capabilities.

Inventive Principle:
Principle #6Universality (Multi-functionality)

4Quantity of substance

If column vectors are stored as arrays in arithmetic units, then memory efficiency is improved, but access time increases due to array traversal requirements

Engineering Contradiction:
Improvememory efficiencyVSAvoidaccess time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The arithmetic units are designed with local storage structures optimized for the specific access patterns required by matrix operations. Column vectors are stored in a format that aligns with the computational requirements, allowing efficient access to specific elements without requiring full array traversal, thus balancing memory efficiency with access speed.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20250173399A1Arithmetic processing apparatus
Publication Date: 2025.05.29 NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE & TECHNOLOGY
  • US20250173399A1 patent drawing
  • US20250173399A1 patent drawing
  • US20250173399A1 patent drawing

AI summary

An arithmetic processing apparatus is a system for matrix multiplication using M arithmetic units connected in series. It processes two M×N-dimensional input matrices (a and b) to produce an M×M-dimensional output matrix (x). Each arithmetic unit stores and processes a specific column vector pair from the input matrices. The calculation occurs through a distributed process where each Mth arithmetic unit stores corresponding column vectors [am, bm] from matrices a and b, column vectors bm are sequentially propagated through the network, each unit calculates dot products between its stored am vector and all incoming b vectors, and the resulting dot products form M-dimensional column vectors (xm) that make up the final output matrix. This distributed approach allows parallel processing of matrix multiplication across the network of arithmetic units, with each unit contributing a portion of the final result.