Matrix Operations Circuitry for Integrated Circuits

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Solution Overview

Problem

Traditional linear matrix equation solvers in integrated circuit devices perform matrix operations as distinct steps, leading to significant latency and resource usage, especially when dealing with large matrices.

Innovation Solution

A matrix operations circuitry with a multiplier circuit that selectively applies complex multiplication operations to compute conjugate or non-conjugate dot product vectors, allowing for shared memory and processing overhead between Cholesky decomposition and forward substitution operations, thereby reducing latency and resource usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If traditional solvers perform matrix operations as three distinct operations (Cholesky decomposition, forward substitution, backward substitution), then each operation can be implemented with standard algorithms, but significant latency and resource usage occur

Engineering Contradiction:

Improvematrix equation solving speedVSAvoidlatency between operations

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The patent merges Cholesky decomposition and forward substitution operations into a unified computational framework. The circuitry is configured to perform both operations using shared resources including the same multiplier circuits, adder circuits, and memory structures. This integration eliminates the sequential execution delays between traditional separate operations, enabling overlapping computations and reducing overall latency while maintaining numerical accuracy.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent implements universal circuitry that can perform multiple matrix operations. The multiplier circuits are designed to handle both conjugate and non-conjugate multiplication operations. The same adder circuits serve both Cholesky decomposition and forward substitution computations. This multi-functionality reduces the total hardware resources needed and eliminates the time penalty of switching between different specialized operation modes.

Inventive Principle:

Principle #6Universality (Multi-functionality)

2Ease of manufacture

If traditional solvers perform matrix operations as three distinct operations, then each operation is isolated and easier to implement, but resource usage increases significantly

Engineering Contradiction:

Improveimplementation simplicityVSAvoidhardware resource consumption

Core Design Contradiction:

Ease of manufactureVSDevice complexity

Solution Approach 1:

The patent combines multiple matrix operations into a unified computational architecture. The circuitry shares common sub-functions including multiplier units, adder units, and memory access pathways. This merging reduces the total hardware footprint while maintaining implementation clarity through a systematic design approach that organizes shared resources around a common operational framework.

Inventive Principle:

Principle #5Merging (Combining)

Solution Approach 2:

The patent creates universal circuitry components that can execute multiple operations. The multiplier circuits are designed with configurable operation modes to handle both conjugate and non-conjugate multiplications. Adder circuits are configured to serve both decomposition and substitution computations. This universality reduces hardware resource consumption while maintaining ease of implementation through standardized, reusable circuit modules.

Inventive Principle:

Principle #6Universality (Multi-functionality)

3Productivity

If separate operations are used for Cholesky decomposition and forward substitution, then each operation can be optimized independently, but overall efficiency decreases

Engineering Contradiction:

Improvecomputational efficiencyVSAvoidtime between sequential operations

Core Design Contradiction:

ProductivityVSLoss of time

Solution Approach 1:

The patent enables continuous computation by integrating Cholesky decomposition and forward substitution into a unified workflow. The circuitry is configured to perform operations in an overlapping manner where decomposition results are immediately available for substitution computations without sequential delays. This continuity eliminates idle time between operations and maintains productive computational action throughout the entire matrix equation solving process.

Inventive Principle:

Principle #20Continuity of useful action

Solution Approach 2:

The patent implements preliminary computation of decomposition results that are immediately available for subsequent substitution operations. The circuitry is designed to prepare and make available the necessary intermediate results from Cholesky decomposition before the forward substitution phase begins, enabling overlapping computations and reducing the effective time between operations.

Inventive Principle:

Principle #10Preliminary action

Data Source

PatentUS8959136B1Matrix operations in an integrated circuit device

Publication Date: 2015.02.17 ALTERA CORP

AI summary

Efficient matrix operations circuitry is based on combining a matrix decomposition and a forward substitution operations to share the same processing overhead. A dual multiplier circuit selectively applies complex multiplication operations to a first and second input vectors for computing a conjugate dot product vector or a non-conjugate dot product vector. The conjugate dot product vector corresponds to the matrix decomposition operation for triangulating an input matrix to generate an element of a triangulated matrix. The non-conjugate dot product vector corresponds to a forward substitution operation for determining an element of a forward substitution vector from the triangulated matrix.