Matrix Space Storage for Dual-Directional Array Access

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Solution Overview

Problem

Existing memory architectures limit direct access and computation of matrices or arrays by restricting access to either rows or columns, requiring complex transformations for operations like matrix multiplication, and are not suitable for parallel processing units due to power consumption and density issues.

Innovation Solution

A Matrix Space storage entity that allows direct access and storage of matrices or arrays in both rows and columns using individual RAM cells, with row and column address lines, enabling concurrent read/write operations and supporting 2D or 3D arrays, facilitating parallel computations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If matrices are stored using conventional memory architectures with single-directional access, then memory structure is simple, but access to both rows and columns requires complex transformations

Engineering Contradiction:
Improveaccess efficiencyVSAvoidtransformation complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The patent applies dimensionality change by transitioning from conventional one-dimensional memory access to two-dimensional matrix space with dual-directional (row and column) access capabilities. This allows simultaneous access to both rows and columns without complex transformations, directly resolving the contradiction between access efficiency and transformation complexity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If conventional memory architectures are used for matrix storage, then power consumption is manageable, but parallel processing capability is limited

Engineering Contradiction:
Improveparallel processing capabilityVSAvoidpower consumption
Core Design Contradiction:
ProductivityVSUse of energy by moving object

Solution Approach 1:

The patent segments the memory architecture into multiple independently accessible matrix spaces that can be simultaneously accessed via row and column bit lines. This segmentation enables parallel processing operations while distributing power consumption across multiple access paths, resolving the contradiction between parallel processing capability and power consumption

Inventive Principle:
Principle #1Segmentation

3Productivity

If matrices are stored in traditional linear memory, then storage density is adequate, but direct computation along rows and columns is inefficient

Engineering Contradiction:
Improvecomputational efficiencyVSAvoidtransformation time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent implements preliminary action by pre-organizing data in two-dimensional matrix space with dedicated row and column address lines before computation begins. This allows direct access to required data elements without runtime transformations, eliminating transformation time and improving computational efficiency

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10600475B2Method and apparatus for storing and accessing matrices and arrays by columns and rows in a processing unit
Publication Date: 2020.03.24 ONNIVATION LLC
  • US10600475B2 patent drawing
  • US10600475B2 patent drawing
  • US10600475B2 patent drawing

AI summary

This invention uses a novel mechanism to store a matrix of numbers or any two dimensional array of binary values in a novel storage entity called a Matrix Space. A matrix space which may reside in a processing unit, is designed to store a plurality of matrices or arrays of values into arrays of volatile or non-volatile memory cells or latch or flip-flop elements much like in a memory, but with accessibility in two or three dimensions. In this invention any row and/or any column of storage elements in a storage array is directly accessible for writing, reading or clearing via row bit lines and column bit lines, respectively. The elements in rows of arrays are selected or controlled for access using row address lines and the elements in columns of arrays are selected or controlled for access using column address lines. This allows access to data stored in matrix space arrays for use in matrix and array computations, by both rows and columns of the arrays.