Thick Backside Metallization for MCSP Wafer Handling
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Solution Overview
Problem
Conventional wafer level chip scale packaging technologies face challenges in manufacturing ultra-thin chips with thick backside metal and molding compound, as thin wafers are difficult to handle mechanically and the scribe line is often covered by molding compound, making precise cutting and handling of individual chip packages challenging.
Innovation Solution
A method involving the deposition of a first packaging layer on the wafer, grinding to thin both the packaging layer and the wafer, forming cutting grooves, and depositing a thick metal layer to provide mechanical support and reduce substrate resistance, allowing for precise cutting and separation of individual chip packages with thick backside metal and molding compound on both sides.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the wafer is thinned to reduce substrate resistance, then Rdson is reduced, but the wafer becomes difficult to handle due to lack of mechanical protection
Solution Approach 1:
The patent applies preliminary action by forming the thick backside metal layer BEFORE thinning the wafer to the target thickness. This sequence ensures that the metal layer provides mechanical support during handling operations, while still achieving the low substrate resistance needed for reduced Rdson in the final thinned state
Solution Approach 2:
The patent creates a composite structure by depositing a thick metal layer (e.g., copper, aluminum, or alloy) on the backside of the semiconductor wafer. This metal layer acts as a mechanically robust substrate that compensates for the fragility of thinned wafers, enabling both easy handling and low electrical resistance
2Reliability
If a thick lead frame is used to reduce spreading resistance, then substrate resistance is reduced, but 100% chip scale package cannot be achieved
Solution Approach 1:
The patent extracts the lead frame from the packaging structure entirely, replacing it with a thick metal layer deposited directly on the backside of the semiconductor wafer. This eliminates the need for additional packaging components while achieving the same electrical performance, thereby enabling 100% chip scale packaging
Solution Approach 2:
The patent merges the substrate and backside metal functions into a single integrated structure. The thick metal layer is deposited directly on the wafer backside, combining the mechanical support function with the electrical conduction function, eliminating the need for separate lead frame components
3Productivity
If the wafer is directly cut along the scribe line at the front surface, then individual chip packages are separated, but the scribe line is covered by molding compound making cutting difficult
Solution Approach 1:
The patent inverts the conventional cutting approach by performing the cutting operation from the backside of the wafer instead of the front surface. The thick metal layer on the backside provides a robust cutting surface, and the scribe line is exposed and accessible for precise cutting without being obscured by molding compound
Solution Approach 2:
The patent applies preliminary action by forming the thick backside metal layer and exposing the scribe line on the backside BEFORE the molding compound is applied to the front surface. This sequence ensures that the scribe line remains accessible for cutting operations and that the metal layer provides mechanical support during the cutting process
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the successful manufacture of ultra-thin chips with reduced substrate resistance and enhanced mechanical support, allowing for precise cutting and handling of individual chip packages while maintaining the integrity of the semiconductor devices.
Implementation Method 1
grinding to thin both the packaging layer and the wafer
Implementation Method 2
depositing a thick metal layer to provide mechanical support and reduce substrate resistance
Data Source
AI summary
A wafer process for molded chip scale package (MCSP) comprises: depositing metal bumps on bonding pads of chips on a wafer; forming a first packaging layer at a front surface of the wafer to cover the metal bumps; forming an un-covered ring at an edge of the wafer to expose two ends of each scribe line of a plurality of scribe lines; thinning the first packaging layer to expose metal bumps; forming cutting grooves; grinding a back surface of the wafer to form a recessed space and a support ring at the edge of the wafer; depositing a metal seed layer at a bottom surface of the wafer in the recessed space; cutting off an edge portion of the wafer; flipping and mounting the wafer on a substrate; depositing a metal layer covering the metal seed layer; removing the substrate from the wafer; and separating individual chips from the wafer by cutting through the first packaging layer, the wafer, the metal seed layers and the metal layers along the scribe lines.