Magneto Electric Memory Cell Look Up Table Design

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Solution Overview

Problem

Integrated circuits with look up tables face challenges in minimizing space requirements and reducing energy consumption for memory cell writing, as they typically rely on numerous transistors and access transistors for programming, which occupy space and consume energy.

Innovation Solution

The integration of magneto electric (ME) magnetic tunnel junction memory cells within look up tables, where direct electrical communication through conductors eliminates the need for semiconductor and insulator components, allowing for voltage-based programming without access transistors, thereby reducing space and energy usage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional transistors and access transistors are used for memory cell programming in look up tables, then reliable data storage and protection are achieved, but the space requirement increases significantly

Engineering Contradiction:
Improvedata storage reliabilityVSAvoidspace requirement
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent extracts and removes the access transistor from the memory cell structure, retaining only the essential magneto-resistive memory cell components (pinned layer, free layer, and barrier layer). This extraction eliminates the space-consuming transistor while preserving the core data storage functionality through direct voltage application to the memory cell stack.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the programming mechanism from current-based transistor switching to voltage-based magneto-resistive switching. By applying voltage directly to the memory cell stack, the invention achieves reliable data storage without requiring access transistors, thus reducing space while maintaining reliability.

Inventive Principle:
Principle #35Parameter changes

2Ease of operation

If access transistors are used for each memory cell, then precise control of memory cell programming is achieved, but the device complexity and space consumption increase

Engineering Contradiction:
Improvememory cell programming controlVSAvoidcircuit structure complexity
Core Design Contradiction:
Ease of operationVSDevice complexity

Solution Approach 1:

The access transistor is completely removed from the memory cell structure. The patent achieves programming control through direct voltage application to the memory cell stack using word lines and bit lines, eliminating the need for access transistors and thereby reducing device complexity while maintaining operational control.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The word lines and bit lines serve dual functions: they provide addressing and selection capabilities traditionally performed by access transistors, while also directly enabling voltage-based programming of the magneto-resistive memory cells. This multi-functionality reduces overall circuit complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If current flow is used for programming memory cells, then reliable data writing is achieved, but energy consumption increases

Engineering Contradiction:
Improvedata writing reliabilityVSAvoidprogramming energy consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The patent substitutes current-based programming with voltage-based programming. By applying voltage directly to the magneto-resistive memory cell stack, the invention switches data without requiring continuous current flow, thereby reducing energy consumption while maintaining reliable data writing through voltage-induced magnetic switching.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The programming mechanism is changed from current-driven to voltage-driven. The patent applies voltage pulses to the memory cell stack to induce magnetic switching in the free layer, achieving reliable data writing with reduced energy consumption compared to traditional current-based methods.

Inventive Principle:
Principle #35Parameter changes

4Adaptability or versatility

If separate read and write circuits are implemented, then functional versatility is improved, but space utilization is reduced

Engineering Contradiction:
Improveread and write functionalityVSAvoidspace utilization
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent merges the read and write operations into a unified voltage-based mechanism. The same word lines and bit lines used for writing data are also used for reading data by detecting the resistance state of the memory cell stack, eliminating the need for separate read and write circuits and improving space utilization while maintaining functional versatility.

Inventive Principle:
Principle #5Merging (Combining)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables more compact integrated circuits with reduced energy consumption for programming, as the magneto electric effect allows for low-energy magnetic orientation changes without current flow, and separate read and write circuits optimize space utilization.

Implementation Method 1

The magneto electric (ME) layer, the free layer, and the barrier layer form a memory cell. The ME layer is in direct communication with a bit line and the free layer is in direct communication with a word line. A voltage applied to the word line and bit line induces a magnetic orientation in the free layer without current flow through the use of the magneto electric (ME) layer.

Methodology Applied
Scientific EffectMagneto electric effect: Magneto-Optic Kerr Effect

Data Source

PatentUS10468083B1Integrated circuits with look up tables, and methods of producing and operating the same
Publication Date: 2019.11.05 GLOBALFOUNDRIES US INC
  • US10468083B1 patent drawing
  • US10468083B1 patent drawing
  • US10468083B1 patent drawing

AI summary

Integrated circuits and methods of operating and producing the same are provided. In an exemplary embodiment, an integrated circuit includes a look up table with a first and second memory cell. The first memory cell includes a first magneto electric (ME) layer, a first free layer adjacent to the first ME layer, and a first fixed layer. The second memory cell includes a second ME layer, a second free layer adjacent to the second ME layer, and a second fixed layer. A first word line is in direct communication with the first and second free layers, wherein direct communication is a connection through zero, one, or more intervening components that are electrical conductors. A first bit line is in direct communication with the first ME layer, and a second bit line is in direct communication with the second ME layer.