Meander Resistor ESD Protection Layout

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Solution Overview

Problem

Meander resistors in integrated circuits face reliability issues due to Electrostatic Discharge (ESD) sensitivity, with existing enhancements not adequately addressing the risk of failure under high voltage and current stress, particularly in non-diffused back-end resistors.

Innovation Solution

The meander resistor layout is modified by positioning the resistor heads far away from the corners of the surrounding body, reducing the risk of ESD damage without introducing additional process steps, and using a 3-D shaped non-conducting body to electrically isolate the resistor.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If resistor heads are positioned close to corners of the body, then area utilization is improved, but ESD sensitivity increases and reliability deteriorates

Engineering Contradiction:
Improvearea utilizationVSAvoidESD sensitivity
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent applies local quality by creating different spatial zones within the resistor structure. The corners of the body are designated as high-risk zones for ESD damage, while the center regions are safe zones. By positioning resistor heads in the center regions away from corners, the design locally optimizes for ESD reliability without compromising overall area utilization, as the safe zones are strategically located to avoid corner proximity while still utilizing available space efficiently.

Inventive Principle:
Principle #3Local quality

2Reliability

If resistor heads are positioned far from corners, then ESD reliability is improved, but area utilization decreases

Engineering Contradiction:
ImproveESD resistanceVSAvoidarea utilization
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent resolves the area utilization issue by transitioning from a two-dimensional layout constraint to a three-dimensional solution. The body is given a non-planar, 3-D shaped structure with varying heights, allowing resistor heads to be positioned in elevated or recessed regions that are spatially separated from corners in multiple dimensions. This vertical dimensionality enables both corner avoidance for ESD protection and efficient space utilization within the same footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Reliability

If a 3-D shaped non-conducting body is used for isolation, then ESD protection is improved, but device complexity increases

Engineering Contradiction:
Improveelectrical isolationVSAvoidstructural complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The 3-D shaped non-conducting body serves multiple functions simultaneously: it provides electrical isolation between the resistor heads and the substrate, acts as a mechanical support structure, defines the spatial boundaries of the resistor elements, and creates the height variations necessary for corner avoidance. This multi-functionality reduces the need for separate isolation structures, thereby limiting the increase in device complexity while achieving superior ESD protection.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS8258916B2Meander resistor
Publication Date: 2012.09.04 NEXPERIA BV
  • US8258916B2 patent drawing
  • US8258916B2 patent drawing
  • US8258916B2 patent drawing

AI summary

The present invention relates in general to the field of integrated circuits, and more specifically to a meander resistor. Basically, a meander resistor can be considered as a bar resistor with the exception of the corner squares (right-angle bends). The Electrostatic Discharge (ESD) sensitivities of on-chip resistors can be a problem for both electronic manufactures and electronic component users. As others components, passive devices are known to be susceptible to ESD events. The context of this invention is to improve the reliability of the resistors during an ESD event. An ESD stress means that high current and high voltage levels are applied to the device. The device has to be able to dissipate this energy without failure.