Semiconductor Memory Access Counter Refresh Control
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Solution Overview
Problem
In semiconductor memory devices, data disturbance occurs during read or write operations, leading to degradation of signal differences between '0' and '1' bits, necessitating frequent refresh operations that increase power consumption, even when access is irregular.
Innovation Solution
A semiconductor memory device with an access counter that tracks the number of accesses to memory array blocks, activating a refresh request signal when a predetermined number is reached, allowing for periodic and sequential activation of word lines for refresh operations, thereby reducing unnecessary refresh cycles and power consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If frequent refresh operations are performed to solve disturbance and data degradation, then data integrity is improved, but power consumption increases
Solution Approach 1:
The patent implements dynamic refresh control by counting the number of access operations to memory array blocks and activating refresh operations only when the access count reaches a predetermined threshold. This dynamic approach adjusts refresh frequency based on actual usage patterns rather than performing refresh operations at fixed intervals, thereby reducing unnecessary power consumption while maintaining data integrity when needed.
Solution Approach 2:
The memory device performs self-monitoring through access counters that track the number of read/write operations to each memory array block. When the counter reaches a threshold, the system automatically triggers a refresh operation for that specific block. This self-service mechanism eliminates the need for external control logic to monitor usage patterns, enabling the system to autonomously optimize refresh operations based on actual access frequency.
2Reliability
If refresh operations are performed based on worst-case scenarios, then data degradation is prevented, but unnecessary refresh operations increase power consumption
Solution Approach 1:
The patent replaces static worst-case refresh scheduling with dynamic access-count-based refresh control. Each memory array block has an associated counter that tracks actual access frequency. Refresh operations are triggered only when the counter reaches a predetermined value, allowing the system to adapt to varying access patterns rather than uniformly refreshing all blocks at fixed intervals. This dynamic approach eliminates unnecessary refresh operations for frequently accessed or recently accessed blocks, reducing power consumption while maintaining data integrity.
Solution Approach 2:
The patent implements localized refresh control at the memory array block level rather than global refresh for the entire memory array. Each block independently monitors its own access count through dedicated counters and triggers refresh operations only when its specific threshold is reached. This localized approach ensures that only blocks requiring refresh are actually refreshed, preventing unnecessary power consumption from refreshing blocks that have not experienced significant data degradation.
3Reliability
If periodic refresh operations are performed for all memory blocks, then data integrity is maintained, but access time increases due to unnecessary refresh cycles
Solution Approach 1:
The patent implements dynamic refresh scheduling that adapts to actual memory access patterns. Access counters track the number of read/write operations to each memory array block, and refresh operations are triggered only when the counter reaches a predetermined threshold. This dynamic approach eliminates fixed periodic refresh cycles that would unnecessarily interrupt access operations, allowing the system to maintain data integrity only when actually needed based on usage patterns.
Solution Approach 2:
The patent extracts and removes unnecessary refresh operations from the memory system by implementing selective refresh based on access counting. Instead of uniformly refreshing all memory blocks at fixed intervals, the system identifies and refreshes only those specific blocks that have reached their access threshold. This extraction of unnecessary refresh operations reduces access time interruptions while maintaining data integrity for blocks that actually require refresh.
Data Source
AI summary
A memory may includes: word lines; bit lines; memory array blocks including memory cells, each memory array block being a unit of a data read operation or a data write operation; a row decoder configured to selectively drive the word lines; sense amplifiers configured to detect data; and an access counter provided for each memory cell block, the access counter counting the number of times of accessing the memory array blocks in order to read data or write data, and activating a refresh request signal when the number of times of access reaches a predetermined number of times, wherein during an activation period of the refresh request signal of the access counter, the row decoder periodically and sequentially activates the word lines of the memory array blocks corresponding to the access counter, and the sense amplifier performs a refresh operation of the memory cells connected to the activated word lines.