Memory Access System With Delay-Index Buffer Switching
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Solution Overview
Problem
Existing memory access systems face challenges in efficiently managing data transmission between electronic devices and external memory, particularly when the delay index of data is less than a threshold value, leading to limitations in processing and accessing pre-processed samples.
Innovation Solution
The proposed memory access system includes a write buffer component with multiple buffers that alternates data transfer and a read buffer component that gathers data from external memory based on a delay index, allowing direct access from the write buffer when the delay index is less than or equal to a threshold value, enabling efficient data processing and retrieval.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If data is transmitted between electronic device and external memory using conventional memory access systems, then data transmission is performed, but processing efficiency is limited when delay index is less than threshold value
Solution Approach 1:
The memory access system is segmented into multiple independent buffer components (write buffer component with first and second write buffers, read buffer component with first and second read buffers). Each buffer operates independently to handle different data access patterns, allowing parallel processing of data with different delay index requirements and improving overall processing efficiency without increasing latency for time-critical operations.
Solution Approach 2:
Data is pre-loaded and stored in the write buffers before being transferred to external memory. The system maintains pre-processed samples in the write buffer component, so when a read request arrives with a delay index less than the threshold value, the data can be immediately retrieved from the write buffer without waiting for memory access operations, thereby reducing latency and improving processing efficiency.
2Productivity
If direct access to pre-processed samples is enabled when delay index is within threshold, then system performance is improved, but system complexity increases
Solution Approach 1:
The memory access system dynamically selects the data source based on the delay index value. When the delay index is less than the threshold value, the system directs read requests to the write buffer component for immediate access. When the delay index exceeds the threshold, the system switches to reading from external memory through the read buffer component. This dynamic adaptation allows the system to optimize performance for different access patterns without requiring a completely complex redesign, as the switching logic follows a clear threshold-based rule.
Solution Approach 2:
The write buffer component acts as an intermediary between the processor and external memory for data with delay index less than the threshold value. Instead of directly accessing external memory for every read request, the system uses the write buffer as an intermediate storage layer that can immediately satisfy read requests for recently written data, reducing the need for complex memory management while improving performance for time-critical accesses.
3Productivity
If multiple buffers are used to alternately transfer data, then data transmission efficiency is improved, but device complexity increases
Solution Approach 1:
The memory access system uses periodic buffer switching where the write buffer component and read buffer component alternate their operations in a regular pattern. The write buffers fill with incoming data while the read buffers service read requests, then they switch roles periodically. This periodic action simplifies buffer management compared to complex dynamic allocation, as the switching follows a predictable pattern that can be managed with simple control logic, while still achieving high data transmission efficiency through parallel buffer operations.
Data Source
AI summary
A memory access system may be used to relay data between an electronic device and external memory. The memory access system may include write buffers which may receive and write information from the electronic device to the external memory. The memory access system may also include read buffers which may gather data from the external memory and send it to a main processing component of the electronic device for processing. The memory access system may be configured so that the main processing component of the electronic device may gather data from the write buffers of the memory access system when a condition is satisfied.