Semiconductor Memory Device Active Region Voltage Buffering

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Solution Overview

Problem

In semiconductor memory devices, high potential differences between adjacent transistor array regions with different operation timings or applied voltages can lead to withstand-voltage breakdown, which existing technologies have not adequately addressed.

Innovation Solution

The implementation of active regions between adjacent transistor array regions, where an intermediate voltage is applied, helps to minimize potential differences and improve voltage-withstanding capabilities by using a control circuit with separate voltage selectors for transistor array regions and active regions, allowing for independent voltage control.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If adjacent transistor array regions with different operation timings or applied voltages are placed next to each other, then device functionality is improved, but high potential difference causes withstand-voltage breakdown

Engineering Contradiction:
Improvedevice functionalityVSAvoidwithstand-voltage capability
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

An active region is introduced as an intermediary structure between adjacent transistor array regions. This active region serves as a buffer zone that mediates the potential difference between regions operating at different voltages, preventing direct electrical stress on the transistor structures while allowing both regions to maintain their required voltage levels for proper functionality.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The semiconductor substrate is segmented into distinct functional regions including transistor array regions and active regions. By dividing the structure into separate zones with specific functions, the patent isolates high-potential-difference areas from sensitive transistor structures, allowing each segment to be optimized for its specific voltage requirements without compromising overall device reliability.

Inventive Principle:
Principle #1Segmentation

2Reliability

If more transistors are added to handle voltage control, then voltage-withstanding capability is improved, but device complexity increases

Engineering Contradiction:
Improvevoltage-withstanding capabilityVSAvoidnumber of transistors
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The active region acts as a passive intermediary structure that provides voltage-withstanding capability without requiring additional active transistor components. This structural solution replaces what would otherwise require complex transistor-based voltage control circuits, thereby maintaining reliability while minimizing device complexity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11410710B2Semiconductor memory device
Publication Date: 2022.08.09 KIOXIA CORP
  • US11410710B2 patent drawing
  • US11410710B2 patent drawing
  • US11410710B2 patent drawing

AI summary

A semiconductor memory device includes a substrate; a first impurity region of a first conductive type; a second impurity region of the first conductivity type apart from the first impurity region in a first direction; a first transistor including a first electrode disposed between the first impurity region and the second impurity region; a third impurity region of the first conductive type apart from the first impurity region in a second direction that crosses the first direction; a fourth impurity region of the first conductive type apart from the third impurity region in the first direction; a second transistor including a second electrode disposed between the third impurity region and the fourth impurity region. The semiconductor memory device includes an active region of the first conductive type between the first transistor and the second transistor.