Memory Address Aliasing Detection via Storage Gaps
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Solution Overview
Problem
In computer systems with large storage capacities, addressing errors due to incorrect most-significant bits in memory references are common, especially when switching between 31-bit and 64-bit addressing modes, leading to aliasing errors that are difficult to detect and correct, especially across multiple address spaces.
Innovation Solution
A system and method that configures storage with defined gaps in address spaces to detect aliasing errors by throwing exceptions when incorrect addresses are referenced, using the DEFINE STORAGE CONFIG command to create non-contiguous addressable ranges, ensuring that only valid addresses within specific slices are accessible, and using hardware exceptions to signal aliasing errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If storage is configured with gaps in address spaces to detect aliasing errors, then measurement precision of address errors is improved, but device complexity increases due to non-contiguous addressable ranges and hardware exception mechanisms
Solution Approach 1:
The address space is segmented into multiple non-contiguous ranges with gaps between them. Each range is assigned to a specific address space (e.g., 31-bit or 64-bit mode), creating distinct segments that prevent aliasing errors by ensuring addresses from different segments cannot collide
Solution Approach 2:
The storage configuration with gaps is established in advance before program execution. This preliminary configuration creates a test environment where aliasing errors can be detected automatically when programs attempt to access addresses in invalid gap regions, without requiring additional runtime checking mechanisms
2Reliability
If gaps are created in valid address ranges, then reliability of address referencing is improved by catching aliasing errors, but loss of information increases due to reduced usable address space
Solution Approach 1:
The address space parameters are changed by introducing gaps at specific boundaries (e.g., between 2GB and 4GB). These parameter changes create detectable patterns in address validity that allow reliable distinction between correct and aliased addresses while minimizing the impact on usable space
3Ease of operation
If hardware exceptions are used to signal aliasing errors, then ease of operation is improved by automatic error detection, but productivity decreases due to exception handling overhead
Solution Approach 1:
The system performs self-service error detection by automatically generating hardware exceptions when aliasing errors occur. The exception mechanism is built into the storage configuration itself, eliminating the need for external error checking code and allowing the system to detect and report errors autonomously
Data Source
AI summary
Aliasing errors, occasioned by, for example, a programming error resulting in including extra or missing bits in a storage address, wrong addressing mode, or wrong address context, are detected by providing a storage address configuration including gaps in valid addresses. Such a programming error is detected and an exception is thrown (that is, an addressing error is detected and indicated) responsive to an address reference to such a gap in valid addresses. Gaps are configured at complementary address ranges to facilitate detection of such aliasing errors.