Nonvolatile Memory Address Holding Circuit for Power-Down Data Retention

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Solution Overview

Problem

Conventional methods for reproducing music or images from optical disks require complex operations to store data from volatile memory to nonvolatile memory upon power-down, involving multiple steps for reading and writing data, which complicates microcomputer control.

Innovation Solution

A memory system with nonvolatile memory cells, holding circuits for top and end addresses, and an operation control circuit that simplifies data storage and retrieval by using control signals to manage addresses and data within the nonvolatile memory cell array, allowing continuous data holding and rewriting.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If data is stored in volatile memory during power-down state, then data can be retained temporarily, but control operations become complicated when transferring to nonvolatile memory

Engineering Contradiction:
Improvedata retentionVSAvoidcontrol operations
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent merges the volatile memory and nonvolatile memory into a single memory device with unified memory cells that exhibit both volatile and nonvolatile characteristics. This integration eliminates the need for separate memory components and complex control operations for data transfer between them, while maintaining data retention capabilities during power-down states

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The memory device performs multiple functions simultaneously: it operates as volatile memory during active states for fast data access, and as nonvolatile memory during power-down states for data retention. The same memory cells and structure handle both operational modes without requiring separate hardware components or complex control logic

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If multiple operations are performed to write data from volatile memory to nonvolatile memory, then data persistence is achieved, but power-up efficiency decreases

Engineering Contradiction:
Improvedata persistenceVSAvoidpower-up efficiency
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The memory device maintains data in its memory cells during power-down states without requiring preliminary write operations to nonvolatile memory. The data is already positioned and ready for immediate retrieval upon power-up, eliminating the time-consuming transfer operations that would otherwise be necessary

Inventive Principle:
Principle #10Preliminary action

3Measurement precision

If separate holding circuits are used for address management, then address tracking is improved, but device complexity increases

Engineering Contradiction:
Improveaddress trackingVSAvoidcircuit structure
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent integrates address holding functionality directly into the memory control logic rather than using separate holding circuits. The control circuit manages both data storage and address tracking within a unified structure, reducing overall device complexity while maintaining precise address management capabilities

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS7821868B2Memory and control unit
Publication Date: 2010.10.26 OL SECURITY LLC
  • US7821868B2 patent drawing
  • US7821868B2 patent drawing
  • US7821868B2 patent drawing

AI summary

A memory includes a first holding circuit holding a first address of first data, a second holding circuit holding at least one of a second address of the first data and the amount of the first data, and an operation control circuit performing an operation rewriting the first address, an operation rewriting the second address or the amount of the first data and an operation continuously holding the first address and the second address or the amount of the first data.